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MC10H161FNR2

Description
Encoders, Decoders, Multiplexers & Demultiplexers Binary to 1-8
Categorylogic    logic   
File Size157KB,7 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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MC10H161FNR2 Overview

Encoders, Decoders, Multiplexers & Demultiplexers Binary to 1-8

MC10H161FNR2 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerON Semiconductor
Parts packaging codeQLCC
package instructionQCCJ, LDCC20,.4SQ
Contacts20
Reach Compliance Codenot_compliant
ECCN codeEAR99
Factory Lead Time1 week
series10H
Input adjustmentSTANDARD
JESD-30 codeS-PQCC-J20
JESD-609 codee0
length8.965 mm
Logic integrated circuit typeOTHER DECODER/DRIVER
Number of functions1
Number of terminals20
Maximum operating temperature75 °C
Minimum operating temperature
Output characteristicsOPEN-EMITTER
Output polarityINVERTED
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC20,.4SQ
Package shapeSQUARE
Package formCHIP CARRIER
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)240
Maximum supply current (ICC)84 mA
Prop。Delay @ Nom-Sup2.2 ns
propagation delay (tpd)2.1 ns
Certification statusNot Qualified
Maximum seat height4.57 mm
surface mountYES
technologyECL
Temperature levelCOMMERCIAL EXTENDED
Terminal surfaceTin/Lead (Sn80Pb20)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width8.965 mm
MC10H161
Binary to 1−8 Decoder
(Low)
Description
The MC10H161 provides parallel decoding of a three bit binary
word to one of eight lines. The MC10H161 is useful in high−speed
multiplexer/demultiplexer applications.
The MC10H161 is designed to decode a three bit input word to one
of eight output lines. The MC10H161 output will be low when
selected while all other output are high. The enable inputs, when either
or both are high, force all outputs high.
The MC10H161 is a true parallel decoder. This eliminates unequal
parallel path delay times found in other decoder designs. These
devices are ideally suited for multiplexer/demultiplexer applications.
Features
http://onsemi.com
MARKING DIAGRAMS*
16
MC10H161L
AWLYYWW
CDIP−16
L SUFFIX
CASE 620A
1
Propagation Delay, 1.0 ns Typical
Power Dissipation, 315 mW Typical (same as MECL 10K™)
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K Compatible
Pb−Free Packages are Available*
DIP PIN ASSIGNMENT
V
CC1
E0
Q3
Q2
Q1
Q0
A
V
EE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC2
E1
Pin assignment is for Dual−in−Line
C
Package. For PLCC pin assignment, see
Q4
the Pin Conversion Tables on page 18 of
Q5
16
16
1
PDIP−16
P SUFFIX
CASE 648
1
MC10H161P
AWLYYWWG
10H161
ALYWG
Q6
Q7
B
the ON Semiconductor MECL Data
Book (DL122/D).
SOEIAJ−16
CASE 966
1 20
LOGIC DIAGRAM
E0 2
E1 15
V
CC1
= Pin 1
V
CC2
= Pin 16
V
EE
= Pin 8
A 7
6 Q0
ENABLE
INPUTS
5 Q1
E1 E0
L
L
L
L
4 Q2
L
L
L
L
3 Q3
L
L
L
L
13 Q4
L
L
L
L
12 Q5
H X
X H
11 Q6
C 14
10 Q7
TRUTH TABLE
INPUTS
OUTPUTS
C B A Q0 Q1 Q2 Q3 Q4 Q5
L L L L H H H H H
L L H H L H H H H
L H L H H L H H H
L H H H H H L H H
H L L H H H H L H
H L H H H H H H L
H H L H H H H H H
H H H H H H H H H
X X X H H H H H H
X X X H H H H H H
20 1
PLLC−20
FN SUFFIX
CASE 775
A
WL, L
YY, Y
WW, W
G
10H161G
AWLYYWW
B 9
Q6
H
H
H
H
H
H
L
H
H
H
Q7
H
H
H
H
H
H
H
L
H
H
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
February, 2006
Rev. 7
1
Publication Order Number:
MC10H161/D

MC10H161FNR2 Related Products

MC10H161FNR2 MC10H161MG MC10H161PG MC10H161MEL MC10H161FN
Description Encoders, Decoders, Multiplexers & Demultiplexers Binary to 1-8 Encoders, Decoders, Multiplexers & Demultiplexers Binary to 1-8 Decoder (Low) Encoders, Decoders, Multiplexers & Demultiplexers Binary to 1-8 Decoder (Low) Encoders, Decoders, Multiplexers & Demultiplexers Binary to 1-8 Encoders, Decoders, Multiplexers & Demultiplexers Binary to 1-8
Is it Rohs certified? incompatible conform to conform to conform to incompatible
Maker ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor
Parts packaging code QLCC SOIC DIP SOIC QLCC
package instruction QCCJ, LDCC20,.4SQ SOP, SOP16,.3 DIP, DIP16,.3 SOP, SOP16,.3 QCCJ, LDCC20,.4SQ
Contacts 20 16 16 16 20
Reach Compliance Code not_compliant unknown unknown unknown not_compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99
series 10H 10H 10H 10H 10H
Input adjustment STANDARD STANDARD STANDARD STANDARD STANDARD
JESD-30 code S-PQCC-J20 R-PDSO-G16 R-PDIP-T16 R-PDSO-G16 S-PQCC-J20
JESD-609 code e0 e4 e3 e4 e0
length 8.965 mm 10.2 mm 19.175 mm 10.2 mm 8.965 mm
Logic integrated circuit type OTHER DECODER/DRIVER OTHER DECODER/DRIVER OTHER DECODER/DRIVER OTHER DECODER/DRIVER OTHER DECODER/DRIVER
Number of functions 1 1 1 1 1
Number of terminals 20 16 16 16 20
Maximum operating temperature 75 °C 75 °C 75 °C 75 °C 75 °C
Output polarity INVERTED INVERTED INVERTED INVERTED INVERTED
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QCCJ SOP DIP SOP QCCJ
Encapsulate equivalent code LDCC20,.4SQ SOP16,.3 DIP16,.3 SOP16,.3 LDCC20,.4SQ
Package shape SQUARE RECTANGULAR RECTANGULAR RECTANGULAR SQUARE
Package form CHIP CARRIER SMALL OUTLINE IN-LINE SMALL OUTLINE CHIP CARRIER
method of packing TAPE AND REEL RAIL RAIL TAPE AND REEL RAIL
Maximum supply current (ICC) 84 mA 84 mA 84 mA 84 mA 84 mA
Prop。Delay @ Nom-Sup 2.2 ns 2.2 ns 2.2 ns 2.2 ns 2.2 ns
propagation delay (tpd) 2.1 ns 2.1 ns 2.1 ns 2.1 ns 2.1 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 4.57 mm 2.05 mm 4.44 mm 2.05 mm 4.57 mm
surface mount YES YES NO YES YES
technology ECL ECL ECL ECL ECL
Temperature level COMMERCIAL EXTENDED COMMERCIAL EXTENDED COMMERCIAL EXTENDED COMMERCIAL EXTENDED COMMERCIAL EXTENDED
Terminal surface Tin/Lead (Sn80Pb20) Nickel/Palladium/Gold (Ni/Pd/Au) Tin (Sn) Nickel/Palladium/Gold (Ni/Pd/Au) Tin/Lead (Sn80Pb20)
Terminal form J BEND GULL WING THROUGH-HOLE GULL WING J BEND
Terminal pitch 1.27 mm 1.27 mm 2.54 mm 1.27 mm 1.27 mm
Terminal location QUAD DUAL DUAL DUAL QUAD
width 8.965 mm 5.275 mm 7.62 mm 5.275 mm 8.965 mm
Output characteristics OPEN-EMITTER - OPEN-EMITTER - OPEN-EMITTER
Peak Reflow Temperature (Celsius) 240 260 260 - 240
Maximum time at peak reflow temperature 30 40 40 - 30

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