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X9317UM8IZ-2.7

Description
Digital Potentiometer ICs CMOS EEPOT 10KOHM 100TAPS 8LD
CategoryAnalog mixed-signal IC    converter   
File Size615KB,13 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance
Download Datasheet Parametric View All

X9317UM8IZ-2.7 Overview

Digital Potentiometer ICs CMOS EEPOT 10KOHM 100TAPS 8LD

X9317UM8IZ-2.7 Parametric

Parameter NameAttribute value
Brand NameIntersil
Is it Rohs certified?conform to
MakerRenesas Electronics Corporation
Parts packaging codeMSOP, SOIC, TSSOP
package instructionTSSOP, TSSOP8,.19
Contacts8, 8, 8
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresNONVOLATILE MEMORY
control interfaceINCREMENT/DECREMENT
Converter typeDIGITAL POTENTIOMETER
JESD-30 codeS-PDSO-G8
JESD-609 codee3
length3 mm
Humidity sensitivity level2
Number of functions1
Number of positions100
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP8,.19
Package shapeSQUARE
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply3/5 V
Certification statusNot Qualified
resistance lawLINEAR
Maximum resistor tolerance20%
Maximum resistor terminal voltage5.5 V
Minimum resistor terminal voltage
Maximum seat height1.1 mm
Nominal supply voltage2.7 V
surface mountYES
technologyCMOS
Nominal temperature coefficient300 ppm/°C
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
Nominal total resistance10000 Ω
width3 mm
DATASHEET
X9317
Low Noise, Low Power, 100 Taps, Digitally Controlled Potentiometer (XDCP™)
The Intersil X9317 is a digitally controlled potentiometer
(XDCP™). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The wiper
position is controlled by a 3-wire interface.
The potentiometer is implemented by a resistor array
composed of 99 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS, U/D, and INC inputs. The
position of the wiper can be stored in nonvolatile memory and
then be recalled upon a subsequent power-up operation.
The device can be used as a three-terminal potentiometer for
voltage control or as a two-terminal variable resistor for current
control in a wide variety of applications.
FN8183
Rev 9.00
November 4, 2014
Features
• Solid-state potentiometer
• 3-wire serial up/down interface
• 100 wiper tap points
- Wiper position stored in nonvolatile memory and recalled
on power-up
• 99 resistive elements
- Temperature compensated
- End-to-end resistance range ±20%
• Low power CMOS
- V
CC
= 2.7V to 5.5V, and 5V ±10%
- Standby current <5µA
• High reliability
- Endurance, 100,000 data changes per bit
- Register data retention, 100 years
• R
TOTAL
values = 10kΩ, 50kΩ, 100kΩ
• Packages
- 8 Ld SOIC, TSSOP, and MSOP
• Pb-free (RoHS compliant)
Applications
• LCD bias control
• DC bias adjustment
• Gain and offset trim
• Laser diode bias control
• Voltage regulator output control
U/D
V
CC
(SUPPLY VOLTAGE)
INC
CS
UP/DOWN
COUNTER
99
98
97
R
H
UP/DOWN
(U/D)
INCREMENT
(INC)
DEVICE SELECT
(CS)
CONTROL
AND
MEMORY
R
H
7-BIT
NONVOLATILE
MEMORY
R
W
R
L
STORE AND
RECALL
CONTROL
CIRCUITRY
96
ONE
OF
ONE
HUNDRED
DECODER
2
WIPER
SWITCHES
RESISTOR
ARRAY
V
SS
(GROUND)
GENERAL
V
CC
V
SS
1
0
R
L
R
W
DETAILED
FIGURE 1. BLOCK DIAGRAM
FN8183 Rev 9.00
November 4, 2014
Page 1 of 13
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