NCP1560
Full Featured Voltage Mode
PWM Controller
The NCP1560 PWM controller contains all the features and
flexibility needed to implement voltage−mode control in high
performance single ended DC−DC converters. This device cost
effectively reduces system part count with the inclusion of a high
voltage startup regulator that operates over a wide input range of
21.5 V to 150 V. The NCP1560 provides two control outputs, OUT1
which controls the main PWM switch and OUT2 with adjustable
overlap delay, which can control a synchronous rectifier switch or an
active clamp/reset switch. Other distinctive features include: two
mode over current protection, line under/overvoltage lockout, fast line
feedforward, soft−start and a maximum duty cycle limit.
Features
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MARKING DIAGRAM
16
1
SO−16
D SUFFIX
CASE 751B
16
NCP1560
AWLYWW
1
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Minimum Operating Voltage of 21.5 V
Internal High Voltage Startup Regulator
Dual Control Outputs with Adjustable Overlap Delay
Single Resistor Oscillator Frequency Setting
Fast Line Feedforward
Line Under/Overvoltage Lockout
Dual Mode Overcurrent Protection
Programmable Maximum Duty Cycle Control
Maximum Duty Cycle Proportional to Line Voltage
Programmable Soft−Start
Precision 5.0 V Reference
Pb−Free Package is Available*
Telecommunication Power Converters
Industrial Power Converters
High Voltage Power Modules
+42 V Automotive Systems
Control Driven Synchronous Rectifier Power Converters
NCP1560 = Device Code
A
= Assembly Location
WL
= Wafer Lot
Y
= Year
WW
= Work Week
PIN CONNECTIONS
V
in
UV/OV
NC
FF
CS
C
SKIP
R
T
DC
MAX
1
16
V
AUX
OUT1
GND
OUT2
t
D
V
REF
V
EA
SS
Typical Applications
ORDERING INFORMATION
Device
NCP1560HDR2
NCP1560HDR2G
Package
SO−16
SO−16
(Pb−Free)
Shipping
†
2500/Tape & Reel
2500/Tape & Reel
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
TX
+
V
in
−
V
in
FF
NCP1560
UV/OV
Overlap
Delay
t
D
OUT1
OUT2
Driver
Startup
Feedforward
SR
Drive
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
L
out
C
out
+
−
V
out
M1
C
clamp
M
clamp
Opto
Error
Amplifier
Figure 1. Active−Clamp Forward Converter
©
Semiconductor Components Industries, LLC, 2006
July, 2006
−
Rev. 7
1
Publication Order Number
NCP1560/D
NCP1560
High Voltage
Startup
Regulator
V
AUX
5.0 V
Reference
V
in
V
REF
UV/OV
CS
UV
Fault
Detection
Modulator
Delay
Logic
Output
Drivers
OUT1
OUT2
t
D
CSKIP
R
T
FF
Oscillator
V
EA
SS
GND
DC
MAX
Figure 1. Simplified Block Diagram
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2
NCP1560
1
V
in
16
V
AUX
C
AUX
14
GND
V
in
1.52 V
2
UV/OV
3.61 V
V
REF
12.3
mA
CSKIP
C
CSKIP
One Shot
Pulse
(600 ns)
6
+
−
+
−
STOP
+
−
V
AUX(on)/AUX(off)
Disable_V
REF
+
−
+
−
S
Q
Monotonic
Start
Latch
(Reset
Dominant)
R
Disable_ss
12
t
D
−
+
−
+
+
2V
−
DIS 15
Delay
Logic
V
AUX
DIS
13
OUT2
OUT1
One Shot
Pulse
(250 ns)
5.0 V Reference
DIS
Disable_V
REF
I
START
Disable
V
AUX
V
REF
11
R
D
Disable
Clock
S
Q
Output
Latch
(Reset
Dominant)
R
V
AUX
5
CS
+
−
+
0.57 V
−
+
V
REF
6
mA
9
SS
C
SS
7
R
T
R
T
+
1.3 V*
−
−
+
−
0.5 V
Soft Start
−
+ Comparator
+
−
CURRENT MIRROR
PWM
Comparator
10
2 kW
Oscillator Ramp
2V
+
−
Max DC
+
−
Comparator
20 kW
V
EA
Disable_ss
I
1
I
1
2
STOP
10 pF
* Trimmed during
manufacturing to obtain
1.3 V with R
T
= 101 kW
+
−
2V
One Shot
Pulse
FF Ramp
(Adjustable)
+
2V
−
2V
40 kW
+
V
DC(inv)
−
27 kW
32 kW
8
DC
MAX
R
P
V
REF
R
MDP
V
in
R
FF
I
+
4
FF
I
FF
5.3 kW
6.7 kW
+
V
−
+
−
Clock
V
125 kW
10 pF
C
FF
Figure 2. NCP1560 Functional Block Diagram
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3
NCP1560
PIN DESCRIPTION
Pin
1
Name
V
in
Application Information
This pin is connected to the bulk DC input voltage supply. A constant current source supplies current from
this pin to the capacitor connected on the V
AUX
pin. The charge current is typically 13.8 mA. Input voltage
range is 21.5 V to 150 V.
Input supply voltage is scaled down and sampled by means of a resistor divider. The supply voltage must
be scaled down between 1.52 V and 3.61 V within the specified input voltage range.
Not Connected.
An external resistor between V
in
and this pin adjusts the amplitude of the FF Ramp in proportion to V
in
. By
varying the feedforward ramp amplitude in proportion to the input voltage, changes in loop bandwidth are
eliminated.
Over current sense input. If the CS voltage exceeds 0.48 V or 0.57 V, the converter enters the
Cycle−by−Cycle or Cycle Skip current limit mode, respectively.
The capacitor connected between this pin and ground sets the Cycle Skip period. A soft−start sequence
follows at the conclusion of the fault period.
A single external resistor between this pin and GND sets the oscillator fixed frequency.
An external resistor between this pin and GND sets the voltage on the Max DC Comparator inverting
input. The duty cycle is limited by comparing the voltage on the Max DC Comparator inverting input to the
Feedforward Ramp.
An internal 6.2
mA
current source charges the external capacitor connected to this pin. The duty cycle is
limited during startup by comparing the voltage on this pin to the Oscillator Ramp.
The error signal from an external error amplifier is fed into this input and compared to the Feedforward
Ramp. A series diode and resistor offset the voltage on this pin before it is applied to the PWM
Comparator inverting input.
Precision 5.0 V reference output. Maximum output current is 6.0 mA.
An external resistor between V
REF
and this pin sets the overlap delay between OUT1 and OUT2
transitions.
Output of the PWM controller with leading and trailing edge overlap delay. OUT2 can be used to drive a
synchronous rectifier topology, an active clamp/reset switch, or both.
Control circuit ground.
Main output of the PWM controller.
Positive input supply voltage. This pin is connected to an external capacitor for energy storage. An
internal current supplies current from V
in
to this pin. Once the voltage on V
AUX
reaches 11 V, the current
source turns OFF. It turns ON again once V
AUX
falls to 7.0 V. During normal operation, power is supplied
to the IC via this pin, by means of an auxiliary winding.
2
3
4
UV/OV
NC
FF
5
6
7
8
CS
C
SKIP
R
T
DC
MAX
9
10
SS
V
EA
11
12
13
14
15
16
V
REF
t
D
OUT2
GND
OUT1
V
AUX
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4
NCP1560
MAXIMUM RATINGS
Symbol
V
in
V
AUX
I
AUX
V
OUT
I
OUT
V
REF
I
REF
V
IO
I
IO
T
J
T
stg
P
D
R
qJA
Input Line Voltage
Auxiliary Supply Voltage
Auxiliary Supply Input Current
OUT1 and OUT2 Voltage
OUT1 and OUT2 Output Current
5.0 V Reference Voltage
5.0 V Reference Output Current
All Other Inputs/Outputs Voltage
All Other Inputs/Outputs Current
Operating Junction Temperature
Storage Temperature Range
Power Dissipation at T
A
= 25°C
Thermal Resistance, Junction−to−Ambient
Rating
Value
−0.3
to 150
−0.3
to 16
35
−0.3
to (V
AUX
+ 0.3 V)
10
−0.3
to 6.0
6.0
−0.3
to V
REF
10
−40
to 125
−55
to 150
0.77
130
Unit
V
V
mA
V
mA
V
mA
V
mA
°C
°C
W
°C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Pin 1 is the HV startup of the device and is rated to the max rating of the part, or 150 V.
Machine Model Method 150 V.
Pins 2−16: Human Body Model 4000 V per MIL−STD−883, Method 3015.
Machine Model Method 200 V.
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