MRF5S21130 datasheet, PDF - EEWORLD Datasheet

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MRF5S21130: DescriptionThe RF MOSFET Line RF Power Field Effect Transistor N-Channel Enhancement-Mode Lateral MOSFETs; CategoryDiscrete semiconductor The transistor; File Size399KB，12 Pages; ManufacturerMotorola ( NXP ); Websitehttps://www.nxp.com

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MRF5S21130 Overview

The RF MOSFET Line RF Power Field Effect Transistor N-Channel Enhancement-Mode Lateral MOSFETs

MRF5S21130 Parametric

Parameter Name	Attribute value
Maker	Motorola ( NXP )
package instruction	FLANGE MOUNT, R-CDFM-F2
Reach Compliance Code	unknow
Shell connection	SOURCE
Configuration	SINGLE
Minimum drain-source breakdown voltage	65 V
FET technology	METAL-OXIDE SEMICONDUCTOR
highest frequency band	S BAND
JESD-30 code	R-CDFM-F2
Number of components	1
Number of terminals	2
Operating mode	ENHANCEMENT MODE
Maximum operating temperature	150 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
Package shape	RECTANGULAR
Package form	FLANGE MOUNT
Polarity/channel type	N-CHANNEL
Maximum power dissipation(Abs)	315 W
Certification status	Not Qualified
surface mount	YES
Terminal form	FLAT
Terminal location	DUAL
transistor applications	AMPLIFIER
Transistor component materials	SILICON

MRF5S21130 Related Products

	MRF5S21130	MRF5S21130S	MRF5S21130R3	MRF5S21130SR3
Description	The RF MOSFET Line RF Power Field Effect Transistor N-Channel Enhancement-Mode Lateral MOSFETs	The RF MOSFET Line RF Power Field Effect Transistor N-Channel Enhancement-Mode Lateral MOSFETs	The RF MOSFET Line RF Power Field Effect Transistor N-Channel Enhancement-Mode Lateral MOSFETs	The RF MOSFET Line RF Power Field Effect Transistor N-Channel Enhancement-Mode Lateral MOSFETs
Maker	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )	Motorola ( NXP )
package instruction	FLANGE MOUNT, R-CDFM-F2	FLATPACK, R-CDFP-F2	NI-880, CASE 465B-03, 2 PIN	FLATPACK, R-CDFP-F2
Reach Compliance Code	unknow	unknow	unknow	unknow
Shell connection	SOURCE	SOURCE	SOURCE	SOURCE
Configuration	SINGLE	SINGLE	SINGLE	SINGLE
Minimum drain-source breakdown voltage	65 V	65 V	65 V	65 V
FET technology	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR
highest frequency band	S BAND	S BAND	S BAND	S BAND
JESD-30 code	R-CDFM-F2	R-CDFP-F2	R-CDFM-F2	R-CDFP-F2
Number of components	1	1	1	1
Number of terminals	2	2	2	2
Operating mode	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE
Maximum operating temperature	150 °C	150 °C	150 °C	150 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	FLANGE MOUNT	FLATPACK	FLANGE MOUNT	FLATPACK
Polarity/channel type	N-CHANNEL	N-CHANNEL	N-CHANNEL	N-CHANNEL
Maximum power dissipation(Abs)	315 W	315 W	315 W	315 W
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
surface mount	YES	YES	YES	YES
Terminal form	FLAT	FLAT	FLAT	FLAT
Terminal location	DUAL	DUAL	DUAL	DUAL
transistor applications	AMPLIFIER	AMPLIFIER	AMPLIFIER	AMPLIFIER
Transistor component materials	SILICON	SILICON	SILICON	SILICON

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