LTC1155
Dual High Side
Micropower MOSFET Driver
FEATURES
s
s
s
s
s
s
s
s
s
s
DESCRIPTIO
Fully Enhances N-Channel Power MOSFETs
8µA Standby Current
85µA ON Current
Short-Circuit Protection
Wide Power Supply Range: 4.5V to 18V
Controlled Switching ON and OFF Times
No External Charge Pump Components
Replaces P-Channel High Side MOSFETs
Compatible with Standard Logic Families
Available in 8-Pin SO Package
The LTC
®
1155 dual high side gate driver allows using low
cost N-channel FETs for high side switching applications.
An internal charge pump boosts the gate above the posi-
tive rail, fully enhancing an N-channel MOSFET with no
external components. Micropower operation, with 8µA
standby current and 85µA operating current, allows use in
virtually all systems with maximum efficiency.
Included on-chip is overcurrent sensing to provide auto-
matic shutdown in case of short circuits. A time delay can
be added in series with the current sense to prevent false
triggering on high in-rush loads such as capacitors and
incandescent lamps.
The LTC1155 operates off of a 4.5V to 18V supply input
and safely drives the gates of virtually all FETs. The
LTC1155 is well suited for low voltage (battery-powered)
applications, particularly where micropower “sleep” op-
eration is required.
The LTC1155 is available in both 8-pin PDIP and 8-pin SO
packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATI
s
s
s
s
s
s
s
S
Laptop Power Bus Switching
SCSI Termination Power Switching
Cellular Phone Power Management
P-Channel Switch Replacement
Relay and Solenoid Drivers
Low Frequency Half H-Bridge
Motor Speed and Torque Control
TYPICAL APPLICATI
Laptop Computer Power Bus Switch with Short Circuit Protection
V
S
= 4.5V TO 5.5V
R
SEN
0.02Ω
R
DLY
100k
C
DLY
0.1µF
+
10µF
C
DLY
0.1µF
R
DLY
100k
R
SEN
0.02Ω
DS1
*IRLR034
5A
MAX
TTL, CMOS INPUT
POWER BUS
V
S
DS2
*IRLR034
5A
MAX
TTL, CMOS INPUT
VOLTAGE DROP (V)
G1
LTC1155
G2
IN1
GND
IN2
µP
SYSTEM
GND
DISK
DRIVE
DISPLAY
PRINTER,
ETC.
*SURFACE MOUNT
1155 TA01
U
Switch Voltage Drop
0.25
0.20
0.15
0.10
0.05
0.00
0
1
2
OUTPUT CURRENT (A)
3
1155 TA02
UO
UO
1
LTC1155
ABSOLUTE
AXI U
RATI GS
U
W W
U
W
(Note 1)
Supply Voltage ........................................................ 22V
Input Voltage ...................... (V
S
+0.3V) to (GND – 0.3V)
Gate Voltage ......................... (V
S
+24V) to (GND – 0.3V)
Current (Any Pin).................................................. 50mA
Storage Temperature Range ................. – 65°C to 150°C
Operating Temperature Range
LTC1155C................................................ 0°C to 70°C
LTC1155I........................................... – 40°C to 85°C
LTC1155M ........................................ – 55°C to 125°C
Lead Temperature Range (Soldering, 10 sec.)...... 300°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
DS1 1
G1 2
GND 3
IN1 4
J8 PACKAGE
8-LEAD CERDIP
8 DS2
7 G2
6 V
S
5 IN2
N8 PACKAGE
8-LEAD PDIP
ORDER PART
NUMBER
DS1 1
LTC1155CN8
LTC1155CJ8
LTC1155IN8
LTC1155MJ8
T
JMAX
= 150°C,
θ
JA
= 100°C/W (J8)
T
JMAX
= 100°C,
θ
JA
= 130°C/W (N8)
ELECTRICAL CHARACTERISTICS
The
q
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
S
= 4.5V to 18V, unless otherwise noted.
SYMBOL
V
S
I
Q
PARAMETER
Supply Voltage
Quiescent Current OFF
Quiescent Current ON
Quiescent Current ON
V
INH
V
INL
I
IN
C
IN
V
SEN
I
SEN
V
GATE
-V
S
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
Drain Sense Threshold Voltage
q
CONDITIONS
q
V
IN
= 0V, V
S
= 5V (Note 2)
V
S
= 5V, V
IN
= 5V (Note 3)
V
S
= 12V, V
IN
= 5V (Note 3)
q
q
0V < V
IN
< V
S
Drain Sense Input Current
Gate Voltage Above Supply
0V < V
SEN
< V
S
V
S
= 5V
V
S
= 6V
V
S
= 12V
V
S
= 5V, C
GATE
= 1000pF
Time for V
GATE
> V
S
+ 2V
Time for V
GATE
> V
S
+ 5V
V
S
= 12V, C
GATE
= 1000pF
Time for V
GATE
> V
S
+ 5V
Time for V
GATE
> V
S
+ 10V
q
q
q
t
ON
Turn ON Time
2
U
TOP VIEW
8
7
6
5
DS2
G2
V
S
IN2
W
ORDER PART
NUMBER
LTC1155CS8
LTC1155IS8
S8 PART MARKING
1155
1155I
G1 2
GND 3
IN1 4
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 100°C,
θ
JA
= 150°C/W
LTC1155M
MIN
TYP
MAX
4.5
8
85
180
2.0
0.8
±1.0
5
80
75
6.0
7.5
15
50
200
50
120
100
100
6.8
8.5
18
250
1100
180
450
120
125
±0.1
9.0
15
25
750
2000
500
1200
18
20
120
400
LTC1155C/LTC1155I
MIN
TYP
MAX
4.5
8
85
180
2.0
0.8
±1.0
5
80
75
6.0
7.5
15
50
200
50
120
100
100
6.8
8.5
18
250
1100
180
450
120
125
±0.1
9.0
15
25
750
2000
500
1200
18
20
120
400
UNITS
V
µA
µA
µA
V
V
µA
pF
mV
mV
µA
V
V
V
µs
µs
µs
µs
q
LTC1155
ELECTRICAL CHARACTERISTICS
The
q
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
S
= 4.5V to 18V, unless otherwise noted.
SYMBOL
t
OFF
PARAMETER
Turn OFF Time
CONDITIONS
V
S
= 5V, C
GATE
= 1000pF
Time for V
GATE
< 1V
V
S
= 12V, C
GATE
= 1000pF
Time for V
GATE
< 1V
t
SC
Short-Circuit Turn OFF Time
V
S
= 5V, C
GATE
= 1000pF
Time for V
GATE
< 1V
V
S
= 12V, C
GATE
= 1000pF
Time for V
GATE
< 1V
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
LTC1155M
MIN
TYP
MAX
10
10
5
5
36
26
16
16
60
60
30
30
LTC1155C/LTC1155I
MIN
TYP
MAX
10
10
5
5
36
26
16
16
60
60
30
30
UNITS
µs
µs
µs
µs
Note 2:
Quiescent current OFF is for both channels in OFF condition.
Note 3:
Quiescent current ON is per driver and is measured independently.
TYPICAL PERFOR A CE CHARACTERISTICS
Standby Supply Current
50
45
40
SUPPLY CURRENT (
µ
A)
SUPPLY CURRENT (
µ
A)
V
IN1
= V
IN2
= 0V
T
J
= 25°C
35
30
25
20
15
10
5
0
0
15
5
10
SUPPLY VOLTAGE (V)
20
1155 G01
600
500
400
300
200
100
0
0
15
5
10
SUPPLY VOLTAGE (V)
20
1155 G02
V
GATE
– V
S
(V)
Input Threshold Voltage
2.4
2.2
INPUT THRESHOLD VOLTAGE (V)
DRAIN SENSE THRESHOLD VOLTAGE (V)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0
15
5
10
SUPPLY VOLTAGE (V)
20
1155 G04
V
ON
V
OFF
100
90
80
70
60
50
0
15
5
10
SUPPLY VOLTAGE (V)
20
1155 G05
V
GATE
(V)
U W
Supply Current/Side (ON)
1000
900
800
700
V
IN1
OR V
IN2
= 2V
T
J
= 25°C
24
22
20
18
16
14
12
10
8
6
4
High Side Gate Voltage
0
15
5
10
SUPPLY VOLTAGE (V)
20
1155 TPC03
Drain Sense Threshold Voltage
150
140
130
120
110
30
27
24
21
18
15
12
9
6
3
0
Low Side Gate Voltage
0
2
8
6
4
SUPPLY VOLTAGE (V)
10
1155 G06
3
LTC1155
TYPICAL PERFOR A CE CHARACTERISTICS
Turn ON Time
1000
900
800
C
GATE
= 1000pF
50
45
40
600
500
400
300
200
100
0
0
15
5
10
SUPPLY VOLTAGE (V)
20
1155 G07
TURN OFF TIME (
µ
s)
TURN-ON TIME (µs)
700
35
30
25
20
15
10
5
0
0
15
5
10
SUPPLY VOLTAGE (V)
20
1155 G08
TURN-OFF TIME (µs)
V
GS
= 5V
V
GS
= 2V
Standby Supply Current
50
45
40
SUPPLY CURRENT (µA)
SUPPLY CURRENT (µA)
35
30
25
20
15
10
5
V
S
= 5V
0
25
50
75
TEMPERATURE (°C)
100
125
V
S
= 18V
INPUT THRESHOLD (V)
0
–50 – 25
PIN FUNCTIONS
Input Pin
The LTC1155 logic input is a high impedance CMOS gate
and should be grounded when not in use. These input pins
have ESD protection diodes to ground and supply and,
therefore, should not be forced beyond the power supply
rails.
Gate Drive Pin
The gate drive pin is either driven to ground when the
switch is turned OFF or driven above the supply rail when
the switch is turned ON. This pin is a relatively high
impedance when driven above the rail (the equivalent of a
few hundred kΩ). Care should be taken to minimize any
loading of this pin by parasitic resistance to ground or
supply.
Supply Pin
The supply pin of the LTC1155 serves two vital purposes.
The first is obvious: it powers the input, gate drive,
regulation and protection circuitry. The second purpose is
less obvious: it provides a Kelvin connection to the top of
the two drain sense resistors for the internal 100mV
reference. The supply pin should be connected directly to
the power supply source as close as possible to the top of
the two sense resistors.
4
U W
1155 G10
Turn OFF Time
C
GATE
= 100pF
TIME FOR V
GATE
< 1V
50
45
40
35
30
25
20
15
10
5
0
Short-Circuit Turn OFF Delay Time
C
GATE
= 1000pF
TIME FOR V
GATE
< 1V
V
SEN
= V
S
–1V
NO EXTERNAL DELAY
0
15
5
10
SUPPLY VOLTAGE (V)
20
1155 G09
Supply Current Per Side (ON)
1000
900
800
700
600
500
400
300
200
100
0
– 50 –25
0
25
50
75
TEMPERATURE (°C)
100
125
V
S
= 5V
V
S
= 12V
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
Input ON Threshold
V
S
= 5V
V
S
= 18V
0.4
–50 – 25
0
25
50
75
TEMPERATURE (°C)
100
125
1155 G11
1155 G12
U
U
U
LTC1155
PIN FUNCTIONS
The supply pin of the LTC1155 should not be forced below
ground as this may result in permanent damage to the
device. A 300Ω resistor should be inserted in series with
the ground pin if negative supply voltages are anticipated.
Drain Sense Pin
As noted previously, the drain sense pin is compared
against the supply pin voltage. If the voltage at this pin is
more than 100mV below the supply pin, the input latch will
be reset and the MOSFET gate will be quickly discharged.
Cycle the input to reset the short-circuit latch and turn the
MOSFET back on.
This pin is also a high impedance CMOS gate with ESD
protection and, therefore, should not be forced beyond the
power supply rails. To defeat the over current protection,
short the drain sense to supply.
Some loads, such as large supply capacitors, lamps or
motors require high inrush currents. An RC time delay
must be added between the sense resistor and the drain
sense pin to ensure that the drain sense circuitry does not
false trigger during start-up. This time constant can be set
from a few microseconds to many seconds. However, very
long delays may put the MOSFET in risk of being destroyed
by a short-circuit condition (see Applications Information
section).
BLOCK DIAGRA
V
S
LOW STANDBY
CURRENT
REGULATOR
IN
TTL-TO-CMOS
CONVERTER
GND
1155 BD
OPERATIO
The LTC1155 contains two independent power MOSFET
gate drivers and protection circuits (refer to the Block
Diagram for details). Each half of the LTC1155 consists of
the following functional blocks:
TTL and CMOS Compatible Inputs
Each driver input has been designed to accommodate a
wide range of logic families. The input threshold is set at
1.3V with approximately 100mV of hysteresis.
A voltage regulator with low standby current provides
continuous bias for the TTL to CMOS converters. The TTL
W
U
U
U
U
ANALOG SECTION
100mV
REFERENCE
10µs
DELAY
DRAIN
SENSE
COMP
ANALOG
DIGITAL
R
ONE
SHOT
S
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
INPUT
LATCH
OSCILLATOR
AND CHARGE
PUMP
GATE
VOLTAGE
REGULATORS
FAST/SLOW
GATE CHARGE
LOGIC
to CMOS converter output enables the rest of the circuitry.
In this way the power consumption is kept to a minimum
in the standby mode.
Internal Voltage Regulation
The output of the TTL to CMOS converter drives two
regulated supplies which power the low voltage CMOS
logic and analog blocks. The regulator outputs are isolated
from each other so that the noise generated by the charge
pump logic is not coupled into the 100mV reference or the
analog comparator.
5
京公网安备 11010802033920号
EEWORLD
