single pulse generating circuit

single pulse generating circuit

The keyed single pulse generating circuit is shown in the figure, which consists of a reverse clamor circuit. It is composed of integrating circuit and Yanmit trigger circuit . The inverting
circuit is composed of Schmitt trigger l, the integrating circuit is composed of R, Ra and c, and the Schmitt trigger circuit is
composed of Schmitt trigger 2 and 3. In the case of logic 7, every time Once the chain switch S is pressed, a pulse should be generated at the input f end of the inverter. ． However, in actual practice, during
the process of pressing the key, due to the vibration of the switch contacts, more than one pulse is generated, and the waveform will jitter (see the waveform at point a). In order to
eliminate this kind of jitter, an integrating circuit is specially added to the circuit to smooth out the narrow pulses and turn the jitter waveform into a slowly changing waveform (see
the waveform at point b). R3 and c in the circuit a determine the time constant and determine the integral. The waveform of the circuit output, Rz is the discharge resistance of c. After the slowly switching
integral signal is shaped by the Diamit trigger circuit , a single pulse can be obtained at the output end that eliminates switching jitter . R4, Rs, and VDl in the circuit are necessary delayed feedback components for the Schmitt trigger circuit .