Interpretation of diode surge current test circuit

This article describes the basic requirements and standard test methods for diode forward surge current testing. In view of the shortcomings of the standard test methods, a circuit solution using signal control, capacitive energy storage and high-power field effect transistor transistor current drive is designed and implemented. , realizes the test of diode forward surge current simply and efficiently.

Generation of sinusoidal half-wave pulse current

Diodes come in many specifications, with common rated on-state currents ranging from hundreds of milliamperes to hundreds of amperes or even higher. The peak pulse current required for IFSM testing requires dozens of times the rated on-state current value. The standard test method is to use a large-capacity power frequency transformer to intercept the mains AC waveform to generate a sine half-wave pulse with a time constant of 10ms and a conduction angle of 0° to 180°, as shown in Figure 1.

Using this method to generate sinusoidal pulse currents of hundreds or thousands of amperes requires a considerable volume and weight of the transformer, making it very inconvenient to install and use. The products of some foreign companies have special requirements for the surge current waveform. For example, they require a sinusoidal half-wave pulse with a time constant of 10ms or 8.3ms and a conduction angle of 0° to 180° in addition to the forward rectified current. Current, or it is required to apply two consecutive sinusoidal half-wave pulse currents with a time constant of 10ms or 8.3ms and a conduction angle of 0° to 180°. Obviously, it is already difficult to meet the testing requirements of different devices by using the mains interception method.

Design ideas

High-power field effect transistor is a standard voltage-controlled current device. In the linear working area of ​​the VDMOS tube, the drain current is controlled by the gate voltage: IDS=GFS*VGS. Apply the required voltage waveform to the gate, and the corresponding current waveform will be output at the drain. Therefore, the use of high-power VDMOS tubes is suitable for achieving the required surge current waveform. The circuit form is shown in Figure 2.

The operational amplifier forms a basic reverse operation circuit, driving the gate of the VDMOS tube. The drain-source current passes through the source sampling resistor of the VDMOS tube, is added to the reverse input terminal of the operational amplifier, and is added to the input waveform to form feedback. The output voltage of the operational amplifier is controlled. The gate voltage VGS of the VDMOS tube controls the drain output current IDS. This IDS is the forward surge current applied to the diode under test (DUT).

The power and current amplification capability of a single VDMOS tube is limited and cannot reach the output current capability of thousands of amps. This problem can be solved by connecting multiple VDMOS tubes in parallel to achieve the required peak current. Common connection methods are shown in Figure 3.

This test plan uses mature circuit control technology to simply and effectively implement various surge impact test requirements. All conventional and easily available components are used. The device is small in size and light in weight. It can be easily installed in an ordinary instrument box and becomes a standard testing instrument. It has the characteristics of flexible use, easy operation, high testing accuracy, safety and reliability.