CMOS Implementation of RF Phase-Locked Loop Frequency Synthesizer

JasonYoo

CMOS Implementation of RF Phase-Locked Loop Frequency Synthesizer [Copy link]

This paper implements a RF phase-locked loop frequency synthesizer, which integrates a voltage-controlled oscillator, a dual-mode pre-divider, a frequency detector, a charge pump, various digital counters, digital registers and control circuits, and a serial interface with the baseband circuit. Its frequency detector frequency, output frequency and charge pump current can be controlled through the serial interface, and it also implements the internal voltage-controlled oscillator and external voltage-controlled oscillator selection, power consumption control and other functions, all of which make the frequency synthesizer highly adaptable and can be used in a variety of communication systems. The phase-locked loop frequency synthesizer has been implemented using the 0125LmCMOS process. The test results show that the locking range of the frequency synthesizer using the internal voltage-controlled oscillator is 1182GHz~1196GHz, and the phase noise can reach -119125dBc/Hz at a deviation of 25MHz from the center frequency. The analog part of the frequency synthesizer uses a 217V power supply voltage and consumes about 48mA of current.