Several Concepts of SOPC Based on FPGA

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Several Concepts of SOPC Based on FPGA [Copy link]

1. SOC (System On Chip)

a): System on chip, which integrates system-level and diversified large functional modules on a single chip to form an integrated system capable of processing various information b): A single-chip circuit system that integrates a microprocessor core with many functional modules.

c): It can greatly reduce the area occupied by the system and improve the performance and robustness of the system. d): Taking the embedded system as the core, integrating software and hardware, and pursuing the highest degree of integration, is the inevitable trend and ultimate goal of the development of electronic system design.

e): Completed by hardware and software

2. SOPC (System On a Programmable Chip)

a): System on a Programmable Chip is a flexible and efficient SOC solution proposed by Altera. It integrates processor, memory (ROM, RAM, etc.), bus and bus controller, IO port, DSP, phase-locked loop, etc. into one FPGA. It has a flexible design method, can be cut, expanded, upgraded, and has the function of in-system programmability of software and hardware.

3. IP core (Intellectual Property core)

[p=24, null, a)：IP is intellectual property. The design of SOC and SOPC is based on the integrated circuit IP core. The integrated circuit IP has been pre-designed and verified, and conforms to the design specifications and standards generally recognized by the industry, and has relatively independent and reusable circuit modules or subsystems, such as CPU, arithmetic unit, etc.

b): Integrated circuit IP modules have the characteristics of high knowledge content, small chip area, fast operation speed, low power consumption, and reusability. c): Dataquest, an American company, defines IP in the semiconductor industry as a pre-designed circuit module used in ASIC, ASSP, and PLD.

d): IP core modules have behavioral level (Behavior), structural level (Structure) and physical level (Physical), corresponding to the different description functions are divided into three categories:

i.: Soft core (Soft ii.: Fire IP Core: It is submitted to users in HDL text form, and has undergone RTL-level design optimization and functional verification, but does not contain specific physical information; it is also called Virtual Compont (VC)

ii.: Fire IP Core: It is between soft core and hard core, and completes design links such as gate-level circuit synthesis and timing simulation, and is submitted to users in the form of gate-level netlist

iii.: Hard IP Core: Based on the physical design of semiconductor process, it has a fixed topology layout and specific process, and has been verified by the process with guaranteed performance.

一直在路上吧

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一直在路上吧

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