The FPGA output is high

平漂流

The FPGA output is high [Copy link]

I drew an FPGA application board, Altera, TQFP144 package. I used a simple frequency division program, and Quartus showed that the program download was completed, but the output was all high. I need guidance from an expert.

仙猫

There is too little information to judge. It is better to ask a fortune-teller. If the pin definition and logic are correct, check whether the crystal oscillator works. As the first step of debugging, avoid adjusting complex logic and write a simple input clock divider to see if it works.

xiaoxiao2211

Is it related to the reset signal?

平漂流

The problem has been solved. Since it is a TQFP package, the pad at the bottom of the chip must be firmly grounded. In addition, the 3.3V, 2.5V, and 1.2V power supplies of the chip cannot be wrong.

scxuchenglong

Since it is a TQFP package, the pad at the bottom of the chip must be firmly grounded. This is of course necessary.