Analog circuits and digital circuits and their applications review materials
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Digital Circuits and Their Applications Review Materials 2005-6-10 (Although it is not a professional course, it is related to the professional "Analog Circuits of Digital Circuits"
In today's era, digital circuits have been widely used in various fields. This newspaper will publish a series of articles in the "Circuit and Production" column to introduce the basic knowledge and application examples of digital circuits.
When introducing the basic knowledge, we will focus on integrated digital circuits, which are divided into two types: TTL and CMOS. Here we focus on CMOS integrated digital circuits because of their low power consumption, wide operating voltage range, strong fan-out capability and low price. Suitable for electronics enthusiasts.
When introducing applications, practicality is the main focus, especially introducing digital circuits in some home appliances and entertainment products. This will enable novice electronics enthusiasts to learn and use digital circuits as quickly as possible.
I. Basic logic circuits 1. Characteristics of digital circuits In electronic equipment, circuits are usually divided into two categories: analog circuits and digital circuits. The former involves analog signals, that is, continuously changing physical quantities, such as the change in a room's temperature within 24 hours; the latter involves digital signals, that is, intermittently changing physical quantities, as shown in Figure 1. When the switch K in Figure 1 is turned on and off quickly, A series of pulses (voltage) are generated on the resistor R, which is the digital signal. People call the electronic circuit used to transmit, control or convert digital signals a digital circuit.
Digital circuits usually have only two states when working: high potential (also called high level) or low potential (also called low level). High potential is usually represented by the code "1", called logic "1"; low potential is represented by the code "0", called logic "0" (defined by positive logic). Note: In relevant product manuals, "H" is often used to represent "1" and "L" to represent "0". In actual digital circuits, how high is the requirement? How low the potential must be to represent "1" or "0" depends on the specific digital circuit. For example, the output voltage of some TTL digital circuits is equal to or less than 0.2V, which can be considered as logic "0", and equal to or greater than 3V, which can be considered as logic "1" (i.e., circuit technical indicators). The potential value of logic "0" or "1" in CMOS digital circuits is related to the operating voltage.
When discussing digital circuit problems, the codes "0" and "1" are often used to represent the two working states of certain devices. For example, a switch that is off represents the "0" state, and a switch that is on represents the "1" state.
2. Three basic logic circuits The basic circuits in digital circuits are AND gates, OR gates, and NOT gates (inverters). The basic forms of AND gates and OR gates have two or more input terminals and one output terminal. Because the input and output can be "0" or "1" respectively and have the function of judgment, they are called basic logic circuits. The symbols (graphs) and main expressions of the three basic logic circuits are shown in the attached table. This table may be difficult for beginners to understand, but once you understand it, you will find it simpler than the usual analog circuits.
(1) AND gate circuit. The AND gate discussed below is a 2-input AND gate, which is also applicable to multi-input AND gates. The function of the 2-input AND gate is designed as follows: when input terminals A and B are both in the logic "1" state at the same time, the output Z is in the logic "1" state. This logical relationship of the 2-input AND gate can be described by the circuit of the Figure 2 model. For Figure 2, the following provisions are made here: when switches K1 and K2 are disconnected, they represent the "0" state of input A and B, and when they are connected, they represent the "1" state of input A and B; when the light L is off, it represents the "0" state of output Z, and when the light L is on, it represents the "1" state of output Z. Then, the various combinations of the "on" and "off" states of switches K1 and K2, as well as the output states that cause the light to be "on" and "off" are listed in a table, which is called a truth table, as shown in the attached table. It can be seen from the truth table that in order to make the light L light up, that is, the output Z must be in the "1" state, and the inputs A and B must also be in the "1" state.
The circuit with the function of the circuit pattern in Figure 2 (referring to the input and output relationship) is called a 2-input AND gate, and is represented by the logical symbols in the attached table.
(2) OR gate and NOT gate. The logical relationship of the OR gate is as follows: as long as one of the input terminals is in the "1" state, the output is "1". The NOT gate has only one input and one output, and its output state is always opposite to the input state, that is, it seeks "negation". Here, the circuits of Figures 3 and 4 can also be used to describe the functions of the OR gate and the NOT gate respectively, and the corresponding truth tables can also be made and the logic symbols can be drawn, as shown in the attached table.
3. Methods of expressing logical functions When designing logic circuits, four methods are often used to express the functional relationship (input and output relationship) of logic circuits, namely logic diagrams, truth tables, function expressions and Karnaugh maps. The attached table only lists three expressions. In practical applications, logic diagrams and truth tables are the most commonly used and must be mastered; function expressions and Karnaugh maps are mainly used by designers when designing digital logic circuits according to requirements.
Digital Circuits and Their Applications (II)
1999 Electronics News No. 17
Nowadays, digital integrated circuit products have completely replaced the early digital circuits composed of discrete components. There are more and more types of digital circuit products, and there are also many ways to classify them. If divided by use, they can be divided into three categories: general-purpose IC (medium and small-scale IC) products, microprocessor (MPU)
products and IC products for specific purposes. Programmable logic devices are an important branch of special-purpose products. According to the logic function, they can be divided into combinational logic circuits, referred to as combinational circuits, such as various gate circuits, various encoders and decoders; sequential logic circuits, referred to as sequential circuits, such as various triggers, various counters, various registers, etc. According to the circuit structure, they can be divided into two categories: TTL type and CMOS type.
The common TTL54/74 series has the following common characteristics: power supply voltage is 5.0V, logic "0" output voltage is ≤0.2V, logic "1" output voltage is ≥3.0V and anti-interference is 1.0V. CMOS digital integrated circuits have more advantages than TTL types. The former has a wide working power supply voltage range, low static power consumption, strong anti-interference ability, high input impedance, and low cost. Therefore, electronic clocks, electronic calculators, etc. all use this type of circuit. In view of this, when introducing digital integrated circuits in the future, CMOS types will be mainly used as examples.
There are many varieties of CMOS digital integrated circuits, including hundreds of devices such as various gate circuits, encoders and decoders, triggers, counters and memories.
II. Application of CMOS integrated circuits 1. Common characteristics (1) Operating power supply voltage. The operating voltage range of commonly used CMOS integrated circuits is 3 to 18V (there are also 7 to 15V, such as the domestic C000 series). Therefore, when using this type of device, the power supply voltage is flexible and convenient, and even unregulated power supplies can be used. (2) Power supply pins. When the CMOS integrated circuit is powered externally, its pins are shown in Figure 5. (3) High input impedance. The input end of the CMOS circuit has a protection circuit composed of a protection diode and a series resistor. Within the normal operating range, the protection diodes are in a reverse biased state, and the DC input impedance depends on the leakage current of these diodes. Under normal circumstances, the equivalent input resistance is greater than 108Ω, so when driving a CMOS integrated circuit, the driving power consumed can be almost ignored. (4) Output current. The output current of CMOS integrated circuits (referring to the output terminals of each independent function inside) is generally 10mA, so a driver output should be added when used. However, if the output terminal is connected to a CMOS circuit (i.e., fan-out capability), due to the high input impedance of the CMOS circuit, one output terminal can drive more than 50 input terminals for low-frequency operation. In fact, there is almost no need to consider the limitation of the fan-out function. (5) Strong anti-interference ability. The anti-interference ability of CMOS circuits refers to the ability of the circuit to maintain the original logic state of the circuit and correctly perform state conversion under the influence of interference noise. The anti-interference ability of the circuit is usually expressed in terms of noise tolerance, namely DC voltage noise tolerance, AC (referring to pulse) noise tolerance, and energy noise (referring to the noise energy accumulated at the input terminal). The DC noise tolerance can reach more than 40% of the power supply voltage, so the higher the power supply voltage used, the stronger the anti-interference ability. This is the reason why higher power supply voltages are used when CMOS logic circuits are used in industry. The corresponding noise tolerance of TTL is only 0.8V (because the working voltage of TTL is 5V). (6) Explanation. At present, most digital circuit products on the market are imported. The prefix of the product model is the company code, such as MC, CD, μPD, HFE, which represent Motorola Semiconductor (MOTA), American Radio (RCA), NEC (NEC), Philips and other companies. The models with the same suffix of each product are interchangeable.
In order to arouse the interest of beginners, the author will start with the application circuit in the following introduction, and introduce their usage methods at the same time, so that they can quickly master their application.
?Wang Shaohua, Hubei, Chengdu Yaoyue
Digital Circuits and Their Applications (III)
Electronics Newspaper No. 18, 1999
2. Application of CMOS Gate Circuits Gate circuits are a basic logic component, which can be used to form combinational logic and sequential logic circuits.
There are many types of CMOS gate circuit products, which can be found in the corresponding manuals, but they can be summarized into eight categories: inverter, NAND gate, NOR gate, AND gate, OR gate, buffer/level converter, combinational logic and logic gate with three-state output, etc. Familiarity with the characteristics and applications of gate circuits can lay a good foundation for learning the working principles of various digital devices (including PC hardware).
(1) Ring oscillator. CD4069 is a six-inverter integrated circuit (IC) in a dual-row plastic package (14 pins), as shown in Figure 6. The IC contains six independent inverters. Each inverter can perform a logical inversion operation. It can also be used to form an oscillator, pulse shaping, and voltage amplification of small signals. Figure 7 shows a ring oscillator circuit formed by connecting an odd number of inverters (3) in series and connecting them end to end. Its output waveform is shown in Figure 8. The operation of the oscillator is based on the fact that when the level passes through each inverter, it takes a certain transmission time τ, that is, each inverter has a delay in level transmission to form a square wave output. For example, when the circuit in Figure 7 is powered on, its output is set to the "0" level (it can also be set to the "1" level). According to the ring connection method in the figure, point A is also the "0" level. According to the inverter inversion logic, the output of inverter I is the "1" level, and the transmission delay from the input of I to the output of I is τ. Similarly, when the level passes through inverters II and III, a total of 2τ time is required to transmit. It takes 3τ for the "0" level to be transmitted from the input of A to the output of III. According to the inverting function of the inverter, after 3τ from the "0" level at point A of I, the output of III changes from the original "0" level to the "1" level. The "1"
level goes to point A again, and then to the output of III after 3τ, so that the output changes from the "1" level to the "0" level. As a result, the square wave of Figure 8 is formed at the output of III. From the formation process of the square wave, it can be seen that the period of the square wave is T=6τ.
Since the time of τ is very short, the frequency of the square wave is very high, and the waveform can only be displayed with an oscilloscope. Since the circuit is simple, when it is used in batches in the factory, the circuit of Figure 7 is often used with an oscilloscope to check the quality of CD4069 products, and estimate their transmission characteristics from the period of the waveform.
Figure 9 is an improved circuit of the square wave generator of Figure 7, which is characterized by an adjustable output square wave frequency. In the circuit of Figure 9, an additional RC circuit is added to make the level from the input end of inverter II to the output end of II. Because the charging and discharging time constant of RC is much greater than the transmission time of the inverter, the delay is greatly increased when the level passes through inverter II. In addition, R is an adjustable resistor. As a result, the square wave formed at the output end of III has an adjustable frequency. The output square wave period can be estimated according to the formula T=2RC. According to the RC value in the figure, the lower limit of the square wave frequency is about 1Hz. The circuit of Figure 9 is simple and can be assembled at once. It is very suitable for occasions where the frequency stability requirement is not high. If it is equipped with the LED drive circuit of Figure 10 and the R value is larger, the LED light flashing can be observed. Using this combined circuit, the quality of CD4069 products can be checked in batches and quickly without connecting an oscilloscope. If the driver tube BG is replaced with 9018, an electroacoustic device is inserted into its collector (LED and R2 are removed), and the R value is adjusted so that the combined circuit works in the audio band, it can be used as a sounder. In the past, some code trainers used this circuit as an annunciator.
?Wang Shaohua, Hubei, Chengdu Yaoyue
Digital Circuits and Their Applications (IV)
1999 Electronics News No. 19
(2) Modulation oscillators with NAND and NOR gates. CD4011 (MC14011B) and CD4001 (MC14001B) are 4-2 input NAND gate and NOR gate ICs, respectively, as shown in Figures 11 and 12. They can both form modulation oscillators and have exactly the same circuit form. They are also extremely simple and have a wide range of uses.
Connecting the input terminals of CD4011 or CD4001 in parallel forms a NOT gate. Then, as shown in Figure 13, an improved multivibrator is formed by connecting external RC components. The period of the oscillator is T?2.2RC, RS is the frequency stabilizing resistor. When designing, RS?R, and generally RS>3R. When RS=10R, the frequency stability of the oscillator is 5%.
By controlling one input end of the NAND gate and the NOR gate, a pulse keyed multivibrator can be formed, as shown in Figure 14. According to the logical relationship of the gate circuit, for the NAND gate in the figure, when the control terminal point A is at a high level, the circuit oscillates, and when point A is at a low level, the circuit stops oscillating. The opposite is true for the NOR gate.
Therefore, if a control pulse is added to the input point A, a pulse keyed oscillator is formed, and the waveform at the output end is shown in Figure 15. Here, the control pulse frequency at point A must be lower than the frequency of the multivibrator.
If CD4011 4-2 is input into the NAND gate, two of the gates form a low-frequency multivibrator, and the other two gates form a 38kHz high-frequency oscillator, and then they are connected in a keyed manner to form a 38kHz modulation oscillator, as shown in Figure 16. In this oscillator, IC-1 and IC-2 form a low-frequency oscillator, IC-3 and IC-4 form a 38kHz high-frequency oscillator, and the signal at the output point C is a 38kHz modulation wave. The modulation wave circuit is combined with the infrared tube transmitting circuit in Figure 17 to form a commonly used single-channel infrared remote control (transmitting) circuit. If it is equipped with an infrared receiving demodulator circuit to demodulate the low-frequency pulse, it can be used as a remote control signal for various home appliances.
?Wang Shaohua, Hubei, Chengdu Remote Appointment
Digital Circuits and Their Applications (V)
1999 Electronics News No. 20
3. Application of Combination Circuits and Sequential Circuits All the gate circuits introduced above can form combination circuits. The characteristic of combination circuits is that the output signal of the circuit is only related to the input signal at that moment and has nothing to do with the original state of the circuit. They are usually called combinational logic circuits, or combinational circuits for short. Common combination circuits include encoders, decoders, digital distributors, and digital selectors. Sequential circuits refer to circuits whose output state is related to the time sequence of the circuit input signal, so they are called sequential circuits, such as various digital registers, various counters, and sequential pulse generators. The above two types of circuits have corresponding devices, and users only need to learn how to use them.
In view of the wide variety of devices in these two types of circuits, the professional terms involved are difficult to understand at the moment, and it is difficult to introduce them systematically. Therefore, the author introduces the characteristics and usage of the above two types of circuits based on application examples. Beginners can find relevant books to learn according to the content introduced, and they can learn digital circuits in depth.
1. BCD code and digital display circuit Digital display is needed everywhere in the electronic field, and it is very easy to make and can be assembled. Figure 18 is the principle block diagram of the digital display circuit. Beginners can also learn a lot of basic knowledge about digital circuits by making digital display circuits.
(1) Encoder Coding and decoding are commonly used methods in digital circuits (including industrial control, single-chip microcomputers and PCs). Encoders can solve many problems in home appliances, industry and engineering, and are also digital circuit knowledge that beginners must master.
The so-called "coding" refers to the process of using a number of numbers or text symbols to represent a specific object according to a pre-agreed agreement (also known as a regulation or definition). For example, the telecommunications bureau has compiled a telephone number 3245110 for a user. In fact, this user is represented by the code 3245110. This is coding.
Writing a number in daily life according to a certain counting method (system) is also called coding. If it is written in decimal, it is encoded in decimal; if it is written in binary, it is encoded in binary. Once the coding rules are defined, all problems derived from it should follow the coding rules. For example, the decimal coding stipulates that a decimal digit is represented by ten different codes according to ten symbols 0, 1, 2...9. If the number exceeds 9, it is represented by multiple digits, and the relationship between the low and high digits is "add one every ten". In binary, each digit (i.e. 1 bit in binary) can only take two different digital numbers, namely "0" and "1". Its characteristics are: "add one every two", that is, when the base digit is 1 and 1 is added, the base digit becomes 0, and 1 is added to the high digit at the same time, for example 1+1=10. In order to be familiar with the representation and operation rules of binary, we use four binary digits to represent a decimal digit and list them in a table, as shown in the attached table.
This table is also a coding method, which is called BCD code. The so-called BCD code is to represent decimal numbers in binary code. When the four-bit binary code is added by 1, there are still six states. However, according to the convention of BCD code, the remaining six states (1010, 1011, 1100, 1101, 1110, 1111) are illegal for BCD code, that is, they are not allowed to appear in BCD code.
(2) Bit and Byte Here, let's talk about the common professional terms in computer technology: bit and byte. "Bit" in computers (including single-chip microcomputers) refers to the bit of a binary number, which is usually represented by bit. For example, 1001 in BCD code is 4 bits. Single-chip microcomputers often process 8-bit binary numbers, which are often defined as a byte, and are usually represented by Byte. The data storage capacity and processing speed in single-chip microcomputers are all in bytes. The unit for expressing memory capacity is kB, called kilobyte (actually 1024 bytes). In computing technology, in order to indicate that the counting method is binary, B is often added after the binary number to distinguish it from other counting systems, such as 1101B in BCD code. Wang Shaohua, Hubei, Chengdu Yaoyue
Digital Circuits and Their Applications (VI)
1999 Electronics News No. 21
(3) Display device. The display device is the final stage circuit of the block diagram circuit in Figure 18 (serial figure in the previous issue), which restores the input digital to digital (here is decimal). There are many types of display devices, each with its own characteristics, and they should be purchased according to the place of use. LCD displays are not bright but consume little power; fluorescent digital tubes are generally bright and consume little power, but the operating voltage is relatively high (anode voltage is 12V and 20V); LED digital tubes are bright and low in price but consume more power (referring to the pen segment power consumption of about 10mA). Here we mainly introduce LED digital tube displays.
There are many varieties of LED digital displays on the market. Taking the WD series as an example, the number of digits of the digital display is one, two, three and four; the size of each digit and the displayed color are also various, such as: red, green, yellow, orange, etc. Here, the WD50 series is taken as an example to illustrate its characteristics and uses. Its size is shown in Figure 19, and the main parameters are as follows: forward voltage 1.6V ~ 2.2V; power consumption ≤ 400mW, working current ≤ 10mA; luminous intensity IV depends on the specific model, such as WD506C (orange) IV is 4500μcd, WD508C (red super bright) IV is 13000μcd (test condition of working current 10mA).
The internal structure of a one-digit LED digital display is shown in Figure 20. When displaying words, its pen segments are some light-emitting diodes. When they work, they can be divided into two types: common anode (connected) as shown in Figure 20 (b) and common cathode (connected) as shown in Figure 20 (a). WD506A is connected with a common anode, and WD506C is connected with a common cathode. The pins of the light-emitting pen segments are shown in Figure 21.
The pins are read clockwise from pin 1 on the top view. Pin 5 is the decimal point display position DP, which can be left unconnected if not used. Since the pen segment numbers of the display are composed of 7 segments (excluding the decimal point), they are often called LED 7-segment digital displays.
(4) BCD-latch/7-segment decoder/driver. The digital display works with the matching driver integrated device. These drivers are often called BCD-7-segment decoders. Different displays are equipped with corresponding driver devices, such as CD4055 specially equipped for LCD display. CD4547 is a BCD-7-segment decoder high current driver. These are all BCD-7-segment decoders. The driver for the LED in Figure 18 is a CD4543 integrated device, which is a 7-segment decoder that can drive LEDs and LCDs. The matching circuit when using CD4543 to drive LEDs is shown in Figure 22. In the figure, R1~R7 are the current limiting resistors of the LED.
Digital Circuits and Their Applications (VII)
1999 Electronics News No. 22
(5) Digital Display Circuits and Methods of Learning Digital Integrated Circuits. The following continues to introduce the circuit composition of the digital display block diagram 18.
In the previous serial (VI) Figure 22, a matching circuit of the BCD-7 segment decoder/driver and the digital tube LED in the digital display circuit has been shown. As can be seen from Figure 22, the input end of the digital tube LED driver is a BCD code signal. This signal can be supplied by the output of CD4518 - binary/decimal synchronous add counter, as shown in Figure 23 (a). Figure 23 (b) also shows the CD4543 integrated circuit that has been introduced. Here, I will first talk to beginners about how to use digital integrated circuits. It is completely different from using discrete component circuits. When using the former, you should grasp the following points.
1) Learn to consult the digital circuit product manual. From the product performance introduction in the manual, find out the pin functions of the digital circuit. Generally, the pin functions are divided into two categories, one is input and output functions; the other is control functions (including controlled and external control). For example, (a) in Figure 23
CD4518, this IC is a synchronous adding counter, which contains two interchangeable binary/decimal counters in one package, and its functional pins are 1~7 and 9~{15} respectively. This counter has a single series pulse input (pin 1 or 2; pin 9 or 10), and 4 BCD code signal outputs (pin 3~6; pin {11}~{14}). In addition, its control function must be mastered, otherwise it will not work. The manual gives the true value of the control function (also known as the function table), that is, the use conditions of the integrated circuit, as shown in Table 2. As can be seen from Table 2, CD4518 has two clock input terminals CP and EN. If the rising edge of the clock is used for triggering, the signal is input by CP, and the EN terminal should be connected to a high level "1". If the falling edge of the clock is used for triggering, the signal is input by EN, and the CP terminal should be connected to a low level "0". Not only that, the clear (also known as reset) terminal Cr should also maintain a low level "0". Only when these conditions are met, the circuit will be in the counting state. If not, the IC will not work. When counting, the input and output states of the circuit are shown in Table 3. It is worth noting that because the output of Table 3 is a binary/decimal BCD code, when the counting pulse at the input end reaches the tenth, the circuit automatically resets to the 0000 state (see serial number 5). In addition, the CD4518 has no pin with a carry function, but as can be seen from Table 3, the circuit will automatically reset under the action of the tenth pulse. At the same time, the 6th or {14th}th pin will output a falling edge pulse. Using this pulse and the EN terminal function, it can be used as a count circuit carry pulse and carry function terminal for multi-digit display. It can be seen that only by making full use of the characteristics of the truth table can the digital circuit be used well.
Readers can find out the input and output truth table of the CD4543 BCD-7 segment decoder/driver according to the above method, and learn how to use the circuit from the table. Due to limited space, its truth table is not listed here. Figure 24 is a partial circuit diagram of the LED digital display block diagram 18, and the pin connections in the figure are completely connected according to the requirements of the truth table.
In the CD4518 of the circuit in Figure 24, because the CP terminal is set as the clock (counting) input, the EN terminal 10 pin is connected to the positive terminal of the power supply (high level)
; the reset terminal Cr{15} pin is grounded to zero level through R1, and the capacitor C1 is used to reset the Cr "1" level when the power is turned on. After turning on, C1 no longer works. It can be seen that the connection of this IC meets the requirements of Table 2. As long as the counting pulse is input from the 9th pin, the CD4518 will output the BCD code. In CD4543, the LD (latch control) terminal 1 pin is connected to the positive terminal of the power supply (high level), the BI (blanking) terminal 7 pin and the ph (for L6CD) 6 pin are all grounded. These conditions meet the requirements of the CD4543 truth table.
It can be seen that learning to use digital ICs is based on this truth table.
?Wang Shaohua, Hubei, Chengdu, China
Digital Circuits and Their Applications (VIII)
1999 Electronics News, No. 23
(6) Schmitt 4-2 Input NAND Gate CD4093. Schmitt NAND Gate is also called Schmitt Trigger. This device can work like a common NAND gate or be connected as a Schmitt Trigger. It is used as a pulse shaping circuit in digital display circuits.
Figure 25 is the pin diagram of CD4093 (IC). The logic symbol inside the IC is slightly different from the logic symbol of the NAND gate. A box-like figure is added, which represents an important hysteresis characteristic of the Schmitt Trigger. When the two input terminals of CD4093 are connected in parallel to form a NOT gate, their input and output characteristics are shown in Figure 26. The upper part of Figure 26 represents the input signal; the lower part of Figure 26 represents the output waveform. As can be seen from the figure, when the input voltage V1 rises to the VT+ level, the trigger flips and the output jumps negatively; after a period of time, when the input voltage drops back to the VT+ level, the output does not return to the initial state, but needs the input V1 to continue to drop to the VT- level before the output flips to the high level (positive jump). This phenomenon is called the hysteresis characteristic, VT+-VT-=△VT.△VT is called the hysteresis voltage of the Schmitt trigger. △VT is related to the power supply voltage of the IC. When the power supply voltage increases, △VT increases slightly. Generally, the △VT value is about 3V. Because the Schmitt trigger has the hysteresis characteristic of voltage, it is often used to shape the pulse waveform to make the rising or falling edge of the waveform steeper; it can also be used for voltage amplitude identification. It is also a very common device in digital circuits.
Figure 27 is a schematic diagram of a single pulse generated by a switch K. When the key switch K is pressed, although we cannot feel the jitter of the switch contact, the output end of K generates multiple pulses due to the actual jitter. In order to eliminate the jitter of the switch, the circuit for eliminating switch jitter in Figure 28 is used. The figure shows the composition of the circuit and the output waveform of each point. In the circuit, R1 is a pull-up resistor. R2 is the discharge resistor of C1. R3 and C1 are constants, which determine the leading and trailing edge states of the waveform at point C. R4, D1 and R5 are the necessary delayed feedback elements for the input and output of the Schmitt trigger circuit. This circuit is a typical circuit of a single pulse generator that eliminates switch jitter.
(7) CD4060 clock pulse generator. CD4060 (IC) is a 14-level frequency divider circuit with an oscillator. When used as an oscillator, it needs to be connected to external R, C components or quartz crystals and capacitors. As shown in Figure 29. The detailed information about CD4060 has been introduced many times in this newspaper, so it will not be repeated here.
?Wang Shaohua, Hubei, Chengdu Yaoyue
Digital Circuits and Their Applications (IX)
1999 Electronics News No. 24
(8) Clock signal in digital display. Figure 30 is a complete circuit diagram of digital display. This circuit is a partial circuit of a multi-point detection control box in engineering. As can be seen from the figure, digital display can be used not only for counting, but also for other purposes. In Figure 30, IC1 is a clock signal generator for digital display, IC2 is a single pulse generator circuit for manual detection (digital display), IC3 is a counter, and IC4 is a BCD-7 segment decoder and LED driver.
CD4060 (IC1) clock signal generator. The clock signal for digital display is determined by the application occasion. For example, the automatic counting of products in the factory is generated by the photoelectric sensor, and here the clock signal is generated by the pulse generator IC1. The pulse period of the generator is T=2.2R2C1, which is set to two seconds, that is, the LED count display changes the reading once every two seconds.
In the circuit, CD4093 (IC2) and switch K3 together form a single pulse generator for self-test. When K3 is touched once, the 1st pin of IC2 is grounded once, and a pulse (negative) is generated at the R4 terminal. In order to eliminate the jitter of the switch on and off, the pulse signal on the 1st pin is shaped by the Schmidt NAND gate IC2, and then the shaped single pulse signal is output from the 10th pin of IC2 (the specific working principle is introduced in the previous issue). When the switch K2 is closed, K3 is touched continuously by humans, and the signal output by the 10th pin of IC2 is added to the 9th pin of the CP terminal of IC3. As a result, the LED displays the number of closures of K3 (0~9), achieving the purpose of manually detecting whether the digital display circuit is working normally. If the resistor R2 in IC1 is replaced by a potentiometer (200kΩ), the display speed of the LED can be adjusted. Figure 31 is a panel diagram of the digital display. Among them, K1 and K2 are interlocking key switches, and K3 is a key switch without lock. When working, press the "cycle test" key to automatically count and display; when detecting, press the "manual" key and touch K3, and the LED will display as K3 is touched. ?Wang Shaohua from Hubei Province, Chengdu, China
Digital Circuits and Their Applications (X)
Electronics News, Issue 25, 1999
4. Application of LED digital display The digital display circuit introduced above can be combined with corresponding devices to form a multi-channel monitoring alarm device. Figure 32 is a principle block diagram of a 10-channel alarm system taken from an engineering project. The LED digital display circuit has two functions: 1. Sending BCD code for the on-signal of the multi-channel alarm monitoring switch. Set each switch to be on for two seconds, then off, and a 20-second on-cycle. 2. The LED displays 0 to 9 numbers to indicate the position of each alarm sensor, so that when the alarm sounds, the user can see the location of the alarm point from the LED. The following introduces the composition of each block diagram. The LED digital display circuit has been introduced in detail and will not be repeated here.
1. CD4067 analog switch. The analog switch in the digital circuit is a very useful device, and it is very convenient to use it to switch the transmission of digital signals. The equivalent circuit of the analog switch is shown in Figure 33. In this figure, 0 to n are the positions of the switch, and A represents the common end of the switch, which is equivalent to a single-pole multi-position switch. The switching of each switch is instructed by BCD code. Each four-bit binary code of the BCD code can correspond to the connection of a switch, and the rest of the switches are disconnected. Each switch can transmit signals in both directions, that is, each switch allows signal transmission from n line to 1 line (input/output) or separation from 1 line to n line (output/input), and allows parallel/serial conversion of signals. The BCD code required for the switch is generated by an external circuit, and the BCD code is called the external address input signal.
Figure 34 is a pin diagram of an integrated analog switch device CD4067. CD4067 is a single 16-way (single-pole 16-bit) analog switch, and each switch is switched by external input binary address codes A, B, C, and D. Among them, pins 10, {11}, {14} and {13} are the input terminals of address codes A, B, C, and D; pins 2 to {11} and {16} to {23} are the input/output terminals (switch positions) of the switch; pin 1 is the output/input common terminal (switch blade) of the switch; pin {15} is the control terminal, low level is effective (selection), high level is prohibited (switch open circuit). The truth table of CD4067 is shown in the attached table. There are 16 states of 4-bit binary codes A, B, C, and D, so the on and off of 16 switches can be controlled. From the truth table, it can be seen that the working mode of CD4067 is exactly the same as that described in Figure 33, but the actual IC has an additional control port {15} INH. This analog switch has a low on-resistance and a high off-resistance, and the amplitude of the digital signal transmitted is 3V to 15V. 2. Multi-channel alarm sensors and sounders The alarm sensors set here are set according to the user's requirements, so it is difficult to introduce in detail, but its requirements can be introduced. No matter what kind of sensor is set, such as vibration or disconnection sensor for anti-theft; smoke sensor for fire prevention; gas sensor for household or commercial use, etc., it must be processed digitally, that is, when the alarm is sounded, the output of the sensor should output a high level (≥12V) to ensure that the alarm signal of the sensor can be transmitted over a long distance. As shown in Figure 35, the disconnection sensor for anti-theft, once the wiring of points A and B is disconnected, point A will output a high level (12V) alarm signal, and then output it to the sounder through the output of CD4067. The high-loudness sounder for alarm has been introduced in this newspaper.
The circuit related to this 10-way alarm device and CD4067 is shown in Figure 36. It can be used in warehouses, petroleum liquefaction stations, and of course it can also be used in the anti-theft system of multi-bedroom villas. Different types of sensors are used in different places. Each sensor is set where it is needed, and the alarm circuit is installed in a box as a monitoring box hung indoors (called the central control room in engineering). Once an alarm sound occurs, the alarm position can be found from the LED display of the monitoring box. It is worth noting that because the external address code of CD4067 is a binary/decimal BCD code, the maximum number of alarm channels that can be controlled is 10, and the remaining 6 channels are vacant. In actual use, the number of alarm channels can also be set as needed. In this case, the 10-channel monitoring signals generated by the LED digital display circuit do not need to be changed, and the unused monitoring signals are operated as vacant positions.
?Wang Shaohua, Hubei, Chengdu Remote Appointment
Digital Circuits and Their Applications (XII)
1999 Electronics News No. 27
2. Three-state output NAND gate and integrated three-state R-S latch trigger.
(1) Three-state output NAND gate. Also known as a three-state gate, it is different from a general NAND gate. In addition to the functions of a NAND gate, its input and output can also appear in a third state - high impedance state (or forbidden state). The logic symbol of the tri-state gate is shown in Figure 41. When the EN terminal is connected to the "0" (or "1") level, the tri-state gate works according to the logic of the NAND gate; when the EN terminal is connected to the "1" (or "0") level, the tri-state gate is cut off. At this time, if you look from the output end, it is in a high-impedance state, so the EN terminal is called the control terminal (also called the enable terminal). In computer circuits, the A and B terminals are often called data input terminals; and when the EN terminal is connected to "0" (or "1"), it is called the working state of the tri-state gate - the high-impedance state. As for whether the EN terminal should be connected to "1" or "0" to make it a high-impedance state? This is determined by the truth table of the given model of integrated circuit, and readers do not need to remember it.
In computers (including single-chip microcomputers), tri-state circuits are very useful. They can be used to transmit multiple different data signals or control signals in turn (input/output) on a wire, as shown in Figure 42. The AB line in the figure that receives three gates is usually called a bus (also called a bus).
If EN1, EN2 and EN3 are connected to the "0" (or "1") level in a time-sharing manner, the three groups of data of AB, CD and EF will be sent to the bus AB in turn according to the relationship between the NAND gates, so as to achieve the purpose of transmitting (input/output) three groups of signals with one bus.
(2) Three-state R-S latch trigger CD4044 Connecting the three-state output NAND gate into an R-S trigger constitutes a latch trigger with three states, such as the integrated circuit CD4044. CD4044 is a 16-pin IC, which contains 4 three-state R-S triggers. Its pin functions are shown in Figure 43. The EN terminal in the figure is the common three-state control terminal of each R-S trigger ("0" level is disabled); S and R represent the input terminals of each R-S trigger, Q1~Q4 represent the output terminals of each trigger, and the Q terminal of the trigger is not brought out. The attached table is the truth table of CD4044. From the table, we can see that compared with the truth table of the R-S NAND gate trigger in the last serialization, except for the addition of a control terminal EN, it is exactly the same. Just connect the EN terminal to a high level, and the IC is an integrated circuit containing four R-S NAND gate triggers. Note: A three-state R-S latch trigger can also be formed using a NOR gate, such as the integrated circuit CD4043. Figure 44 is an alarm circuit designed using CD4044. The AB line is the anti-theft line set by the user (composed of enameled wire). Use this line to enclose the area to be protected from theft. The R-S trigger drawn in the figure refers to the principle of the internal circuit of CD4044 rather than the actual complete circuit. In the figure, the S1 terminal is high level ("1") through the resistor R2, but due to the short circuit of the AB line, S1 is at the "0" level, and the R1 terminal is connected to the "0" level through the resistor R1. The EN terminal (three-state) is connected to a high level to make CD4044 work according to the logic of the R-S trigger. Capacitor C sets the R1 terminal to "1" level when the power is turned on. From the CD4044 truth table, it can be seen that after the power is turned on, the R-S trigger is in the "1" state, Q1 outputs a high level, the BG1 tube is saturated and turned on, and the BG2 tube is cut off. Once the AB line is cut off by the thief, S is in the "1"
level. Because R1 is in the "0" level, the R-S trigger is set to the "0" state (see the truth table), the BG1 tube is cut off, BG2 is turned on, and the sounder works and emits an alarm sound. Switch K is the reset switch of the secondary distribution AB line. From the above, it can be seen that when analyzing the circuit, it is only necessary to grasp the characteristics of the R-S trigger and the CD4044 truth table, and the circuit principle of Figure 44 will be clear at a glance. ? Chengdu Shi Wei
Digital Circuits and Their Applications (XIII)
1999 Electronics News No. 28
3? T-type trigger and timer circuit.
By properly connecting the lead-out terminals of the R-S trigger, a T-type trigger can be formed, as shown in Figure 45. The T-type trigger is a bistable circuit and can be used as a frequency divider. The T point in the circuit is called the trigger terminal (also called the clock terminal). When the power supply of the T-type trigger is turned on, which of the A and B terminals is high or low is random. Once a pulse signal is input at the trigger terminal T, the pulse is added to the R and S terminals through capacitors C1 and C2. It can be seen from the truth table of the NAND gate R-S trigger in the previous period that when the input pulse is high, the circuit maintains the original state; when the input pulse jumps from high level to low level, the circuit is triggered to change the original state, and its input and output waveforms are shown in Figure 46. As can be seen from the waveform diagram, the pulse wave at the output terminal and the input terminal is a two-frequency division effect. There are many forms of T-type trigger circuits in practice, such as some T-type triggers with clear terminals, but their basic functions are the same.
In digital integrated circuits, T-type triggers are widely used. The counting units inside the IC CD4060 and CD4518 products introduced above are serial counters composed of multiple T-type triggers. Since T-type triggers have frequency division functions, they can be used to make timers.
Figure 47 is a timer circuit composed of CD4060, CD4518, CD4069 and BG tubes, etc. Its timing time is adjustable, and the longest timing can reach more than 10 hours. The functions of each integrated circuit in the circuit have been introduced in detail, so they will not be repeated here. The working principle of the timer is as follows: the circuit is powered on (+12V), because capacitors C3 and C2 cannot change transiently, the power-on signal (high level) clears IC1 and IC2, and IC26 pin outputs a low level, which is inverted to a high level by IC3. The high level drives relay J to work, and its contact J0 is closed to provide a timing start signal. After the power is turned on, IC14060 starts to oscillate and internally divide the frequency (14-level two-division frequency), and its oscillation period T=2.2 (R2+R3) C1, and the oscillation period is adjustable by R3. After the internal frequency division, the pulse signal of the oscillation is output from the 3-pin Q14 terminal to the
2-pin clock terminal EN (negative jump trigger) of IC2CD4518 (single-ended input, BCD code output). The clock signal is internally divided and outputs a high-level signal from the 6-pin Q4 terminal of IC2. After the high-level signal is inverted by IC3-1, one signal turns off BG, the relay stops working, and J0 disconnects the timing and ends; the other signal is inverted by IC3-2 to a high level and added to the 1-pin of IC2 to stop CD4518 from working (keep the original state). To time the second time, press the synchronization switch K first to reset IC1 and IC2, and then start timing again. Figure 48 is the waveform diagram of each point of CD4518 output.
Regarding the setting of the timing time, R3 can be adjusted. Digital circuits and their applications (XIV)
1999 Electronics News No. 29
4? J-K and D-type flip-flops. J-K and D-type flip-flops are still mainly composed of R-S type flip-flop circuits, and some other functional circuits are added. Their specific circuits are also relatively complex. However, according to the method of learning digital circuits, you can ignore its internal structure and only focus on its input/output relationship. Therefore, when introducing J-K and D-type flip-flops, its truth table and use are still the main focus.
In order to understand the memory function of various flip-flops, the concept of data latching is introduced here. The combinational logic circuit that has been introduced has the characteristic that the output signal of the circuit is only related to the input signal at that moment. Once the input signal is removed, the output signal disappears. For example, in the decimal-binary coding circuit, when the single pulse switch is manually pressed, the coding circuit will generate a corresponding coding signal (which can be regarded as data). Once the hand leaves the switch, the output end will be restored to its original state. If the output signal of the encoder needs to be retained (i.e. stored), it is necessary to add a trigger circuit. Moreover, in computer circuits, in order to process multiple data, they are all
processed at a given time (i.e. clock signal), which requires that the input end of various triggers has a clock input signal (CP end) in addition to the data signal. When the clock CP signal does not reach the input end of the trigger, the control signal (including data) at the input end has no effect on the trigger. The logic symbol and truth table of the J-K type trigger are shown in Figure 49 and the attached table. It has two control terminals J, K and a clock terminal CP. It can be seen from the attached table that the J-K type trigger changes its output state (set to "0" or "1" state) at the falling edge of the clock pulse. Qn in the table represents the original state, Qn represents the state opposite to the original state, and Qn+1 represents the new state after the clock CP arrives. Figure 50 is the waveform of the clock signal at the input end of the J-K type trigger and the output signal when the frequency is divided by two.
Note: The bus AB in Figure 42 of this serial (XII) is changed to MN to distinguish it from the input terminals A and B.
?Chengdu Shi Wei
Digital Circuits and Their Applications (XV)
1999 Electronics Newspaper No. 30
The logic circuit symbol of the D-type flip-flop is shown in Figure 51. Appendix a is its truth table. Figure 52 is the schematic diagram of the D-type flip-flop circuit. According to Figure 52, readers can easily transition from the truth table of the previous serialized appendix to Appendix a. As can be seen from Appendix a, the D-type flip-flop is similar to the emitter follower circuit of a crystal triode, that is, under the command of the rising edge of the clock CP signal, the D-type flip-flop can transfer the data at the D end to the output end. When there is no CP signal at the input end, the D-end signal has no effect on the flip-flop. Figure 53 is a two-way frequency division circuit composed of D-type flip-flops, and Figure 54 is a waveform diagram of the input clock and output Q of the two-way frequency division circuit. Note: Once each flip-flop is made into a product IC, its input end also adds a "0" end or a "1" end.
Figure 55 is the pin diagram of the integrated circuit CD4013, which has two D flip-flops inside, and Appendix b is its truth table. Figure 56 is a teaching experiment made by a vocational school using CD4060 and dual D flip-flop CD4013 - part of the principle circuit diagram of the traffic red and green light manager. Here CD4013 is used as a frequency divider, and red and green light-emitting diodes are connected to its output terminals Q and Q. The connection of each pin of IC2 in Figure 56 fully meets the requirements of the truth table in Appendix b. IC1 is an oscillating frequency division circuit composed of CD4060 (already introduced). Adjust R3 to make the output pulse period of IC1's 1 pin a fixed value (such as two minutes), and then divide the frequency by IC2. As a result, the red and green light-emitting tubes will light up in a cycle according to the specified time, achieving the purpose of the experiment.
? Chengdu Shi Wei
Digital Circuits and Their Applications (Sixteen)
1999 Electronics News No. 31
Sixth, Counters In digital circuits, counters belong to sequential circuits, which are mainly composed of flip-flops with memory functions. Counters are not only used to record the number of pulses, but also widely used for frequency division, program control and logic control, etc. They have been widely used in computers and various digital instruments. Among the CMOS circuit series products, counters are the most widely used products with the largest variety.
1. Output mode of counter IC. Counter IC is a memory device with single-end input and multi-end output. It can remember how many clock pulses are sent to the input end and represent them in different states at the output end, which constitutes different output modes. This different output mode provides users with multiple uses and brings great convenience to use. The following introduces several common output modes of counter IC.
(1) Single-end input decimal counting/7-segment decoding output. This output mode is usually used for counting display. It directly translates the input pulse number into 7-segment code for the digital tube to display the number of 0 to 9, as shown in Figure 57. The IC in Figure 57 is CD4033. The pulse number is input from the clock end CP1 pin of the IC, and its output end can directly drive the LED digital tube to display the number of input pulses. The display of this circuit can also be used for fluorescent digital tubes, but the power supply should be added according to the use of fluorescent digital tubes.
(2) Single-ended input and BCD code output. Figure 58 is a counter circuit with single-ended input and BCD code output. This circuit can control 10 signals externally. For specific uses, please refer to the introduction in (IX) and (X) of this series. CD4518 and CD4520 are a pair of sister products. CD4518 uses binary/decimal BCD, while CD4520 uses binary code. Except for this difference, they are exactly the same. So in Figure 58, if CD4518 is replaced with CD4520 (the pin connection method remains unchanged), its output is binary code, with a total of 16 states, which can control 16 signals externally.
(3) Single-ended input/distributor output. Figure 59 is a single-ended input decimal counting and distribution output circuit of IC CD4017. The counting state is displayed by the ten decoder output terminals Y0~Y9 of CD4017. Each output state corresponds to the number of clock pulses input to the counter.
For example: if 6 pulses are input, the output terminal Y5 should be high level, and the other output terminals should be low level (condition: counting starts from zero). CD4017 still has two clock terminals CP and EN. If the rising edge of the clock pulse is used for counting, the signal is input from the CP terminal; if the falling edge is used for counting, the signal is input from the EN terminal. The two clock terminals are set for the convenience of cascading. CD4017 and CD4022 are a pair of sister products. The main difference is that CD4022 is octal, so the decoding output is only Y0~Y7. Every 8 pulse cycles can get a carry output. Their pins are the same, but the 6th and 9th pins of CD4022 are empty pins. The application of CD4017 has been introduced in various electronic newspapers and magazines.
(4) Multi-bit binary output serial counter. Commonly used ICs are CD4024, CD4040 and CD4060, which are 7, 12 and 14-bit serial counters/distributors respectively. They all have the same circuit structure and function, and are binary counters composed of T-type flip-flops. The difference is that they have different number of bits. Multi-bit binary counters are mainly used for frequency division and timing, and are extremely simple and convenient to use.
Figure 60 is a 7-bit binary serial counter/distributor circuit diagram represented by CD4024. Its characteristics are that there are 7 counting stages inside the IC, and each counting stage has an output terminal, namely Q1~Q7. When CD4024 counts, Q1 is the frequency division of the CP pulse; Q2 is the frequency division of the output of Q1..., so there is a frequency fQ7=fcp. CD4024 can also expand more frequency divisions. The truth table of CD4024 is shown in the table above. It can be seen from the table that when the clearing terminal Cr adds a "1" level, all output terminals are cleared; the normal working condition of the circuit is that Cr adds a zero level, and when the CP pulse falls, CD4024 counts incrementally.
?Chengdu Shi Wei
Digital Circuits and Their Applications (Seventeen)
1999 Electronics News No. 32
2?Counter Classification and Application. There are many types of counter products. To facilitate learning, you can learn them according to the types of counters, but you don't have to memorize them. The important thing is to master their characteristics and the uses of various types of counters. Appendix 1 is a common classification table of CMOS counter products.
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