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DC-DC boost circuit, FB pin voltage has an abnormal pulse [Copy link]

 
As shown in the DC-DC boost circuit below, a digital potentiometer is used to adjust the output, and the networks RW and RH at the FBX pin are connected to the two output terminals of the digital potentiometer.
The problem now is that at the moment when the output voltage jumps from high voltage to low voltage, the voltage at the FBX controller jumps to 4.75V (see the oscilloscope waveform below), while the normal FBX voltage is 1.6V. This causes the digital potentiometer and MCU to burn out (the digital potentiometer and MCU are both powered by 1.8V). Could you please tell me what causes this problem? How can I solve it? Thank you!
Note: When the output level changes from low to high, the voltage of FBX seems to jump to 2.2V.

MAX5395.pdf (1.43 MB, downloads: 5) lt8365.pdf (2.16 MB, downloads: 1)

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Connecting a capacitor to the lower resistor will form an RC circuit with the resistor network on the FB pin. The frequency point corresponding to the RC circuit contributes an additional pole in the loop, resulting in additional phase shift, which can easily cause unstable loop output oscillation. This is why I have never seen a capacitor added to the FB pin in so many voltage feedback designs.   Details Published on 2024-11-14 17:21
 
 

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[At the moment when the output voltage jumps from high voltage to low voltage, the voltage at the FBX tube jumps to 4.75V (see the oscilloscope waveform below), while the normal FBX voltage is 1.6V]

It is speculated that the capacity of C95 and C96 is too small or the equivalent resistance is too large.

Increase the value of C96, or replace C96 with multiple capacitors in parallel. Alternatively, you can try slowing down the turn-off of Q2 and Q1.

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Hello, at present, when debugging, Q1 and Q2 are turned on as soon as the power is turned on. The voltage change moment mentioned above refers to the moment when the digital potentiometer changes the output resistance. I will increase C95 and C96 later. Thank you!  Details Published on 2024-10-15 18:06
Hello, at present, when debugging, Q1 and Q2 are turned on as soon as the power is turned on. The voltage change moment mentioned above refers to the moment when the digital potentiometer changes the output resistance. I will increase C95 and C96 later. Thank you!  Details Published on 2024-10-15 13:00
 
 
 

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The VCC_1V8 symbol in the second schematic diagram cannot be found in the first diagram. Where is VCC_1V8 connected in the first diagram?

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Hello, senior. The VCC_1V8 in the second picture is 1.8V obtained by VCC_12V through LDO (AMS1117-1.8), thank you!  Details Published on 2024-10-15 13:01
 
 
 

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maychang posted on 2024-10-15 11:55 [At the moment when the output voltage jumps from high voltage to low voltage, the voltage at the FBX tube jumps to 4.75V (see the oscilloscope waveform below), while the normal FBX ...

Hello, senior, currently when debugging, Q1 and Q2 are turned on as soon as the power is turned on. The voltage change moment mentioned above refers to the moment when the digital potentiometer changes the output resistance.

I will try to improve C95 and C96 later. Thanks!

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[The voltage change moment mentioned above refers to the moment when the digital potentiometer changes the output resistance] There is no digital potentiometer in the first post. Where is the digital potentiometer connected?  Details Published on 2024-10-15 18:18
[The voltage change moment mentioned above refers to the moment when the digital potentiometer changes the output resistance] There is no digital potentiometer in the first post. Where is the digital potentiometer connected?  Details Published on 2024-10-15 14:53
 
 
 

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maychang posted on 2024-10-15 12:33 The VCC_1V8 label in the second schematic diagram cannot be found in the first diagram. Where is VCC_1V8 connected in the first diagram?

Hello, senior. The VCC_1V8 in the second picture is 1.8V obtained by VCC_12V through LDO (AMS1117-1.8), thank you!

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If VCC_1V8 is obtained by passing VCC_12V through LDO (AMS1117-1.8), it will probably not be damaged by the sudden load change of the Buck circuit formed by U3. This LDO does not seem to be in the first post.  Details Published on 2024-10-15 14:56
 
 
 

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xiaxingxing posted on 2024-10-15 13:00 Hello, senior, at present, Q1 and Q2 are turned on as soon as the power is turned on during debugging. The voltage change moment mentioned above refers to the moment when the digital potentiometer changes the output resistance. ...

[The voltage change moment mentioned above refers to the moment when the digital potentiometer changes the output resistance]

There is no digital potentiometer in the first post. Where is the digital potentiometer connected?

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Hello, senior. Please refer to the RH and RW network for the connection of the digital positioner. Thank you!  Details Published on 2024-10-15 18:03
 
 
 

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xiaxingxing posted on 2024-10-15 13:01 Hello, senior. The VCC_1V8 in the second picture is the 1.8V obtained by VCC_12V through LDO (AMS1117-1.8), thank you!

If VCC_1V8 is obtained from VCC_12V through LDO (AMS1117-1.8), it will probably not be damaged by the sudden load change of the Buck circuit formed by U3.

This LDO doesn't seem to be in the picture in the first post.

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I guess it's because the three terminals of the adjustable resistor of the digital potentiometer should be connected.

Why is your circuit not connected to the low end?

The correct circuit is similar to the figure below.

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Well, why? Thanks!  Details Published on 2024-10-15 18:04
 
 
 

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In actual use, digital potentiometers are not completely equivalent to adjustable resistors.

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maychang posted on 2024-10-15 14:53 [The voltage change moment mentioned above refers to the moment when the digital potentiometer changes the output resistance] The digital potentiometer is not seen in the first post. The digital potentiometer is connected...

Hello, senior. Please refer to the RH and RW network for the connection of the digital positioner. Thank you!

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Hello, I want to correct a phenomenon: when the output voltage jumps from 13.6V to 36.1V, no pulse is seen on FBX, and FBX remains at 1.6V. Only when the output voltage jumps from 36.1V to 13.6V can a pulse be seen (this phenomenon has been confirmed repeatedly). What is the reason? Thank you!  Details Published on 2024-10-15 18:07
 
 
 

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tagetage posted on 2024-10-15 17:10 I guess it is because the three ends of the adjustable resistor of the digital potentiometer should be connected correctly. Why is your circuit not connected to the low end? The correct circuit is similar to the figure below...

Well, why? Thanks!

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maychang posted on 2024-10-15 11:55 [At the moment when the output voltage jumps from high voltage to low voltage, the voltage at the FBX tube jumps to 4.75V (see the oscilloscope waveform below), while the normal FBX ...

I increased the values of C95 and C96, but the problem still exists. I reduced the values of C95 and C96, and the duration of the pulse became shorter. In addition, I want to correct a phenomenon: when the output voltage jumps from 13.6V to 36.1V, FBX does not see the pulse. FBX remains at 1.6V, and the pulse is only seen when the output voltage jumps from 36.1V to 13.6V. What is the reason? Thank you!

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xiaxingxing posted on 2024-10-15 18:03 Hello, senior. For the connection of the digital position meter, please refer to its RH, RW network, thank you!

Hello, I want to correct a phenomenon: when the output voltage jumps from 13.6V to 36.1V, no pulse is seen on FBX, and FBX remains at 1.6V. Only when the output voltage jumps from 36.1V to 13.6V can a pulse be seen (this phenomenon has been confirmed repeatedly). What is the reason? Thank you!

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xiaxingxing posted on 2024-10-15 13:00 Hello, senior, at present, Q1 and Q2 are turned on as soon as the power is turned on during debugging. The voltage change moment mentioned above refers to the moment when the digital potentiometer changes the output resistance. ...

[The voltage change moment mentioned above refers to the moment when the digital potentiometer changes the output resistance]

Do you mean that the digital potentiometer and MCU burn out at the moment the value of the digital potentiometer changes (that is, there are signals on the SCL and SDA lines)?

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At present, it is found that the output voltage has a high voltage to low voltage moment, there is a 2.2V pulse on FBX, and at the beginning of debugging, it is found that there is a 4.75V pulse on FBX because of the leakage welding R60. However, no pulses higher than 1.8V are seen on the digital signal lines of I2C and SDA. At present, it is found that several digital potentiometers and MCUs are burned.  Details Published on 2024-10-15 21:40
 
 
 

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This post was last edited by Shawn.TAO on 2024-10-15 19:44

You can disconnect the post-stage Q1 MOS first, add a clamp protection to the digital potentiometer pin, and turn on the power supply before using it in the circuit.

Why does it need to be changed from 36V to 13.6V? Try to change the value of the digital potentiometer slowly through I2C, and let the voltage be 36V-35V-34V-...-13.6V.

The voltage of the FB pin comes purely from the output resistor voltage divider: the instantaneous change to 4.75V indicates that the resistance of the potentiometer has increased instantaneously.

From 36V to 13.6V, the resistance of the potentiometer changes from 70Ω to 2.6K instantly. The loop has not had time to adjust the output. At this time, the output is still 36V. The equivalent resistance of the lower end of FB is 3.2K, which is divided by the upper end 24K to obtain a voltage of about 4.25V.

If the circuit is not burned out, the LT8365 will start loop regulation and let the output voltage slowly drop to 13.6V. The problem is that the 4.25V voltage has broken down the digital potentiometer.

The simple way to solve this problem is to slowly change the resistance of the digital potentiometer so that the output voltage drops slowly instead of suddenly changing. By calculation, the voltage surge on FB caused by the sudden change of the resistance of the digital potentiometer can be made not to exceed 1.8V (there is only a 0.2V margin, it is recommended to change it to 0.1V)

According to this schematic, the resistance of the digital potentiometer decreases from 13.6V to 36V. You should find a drop in the FB call, which is not good. It is recommended to slowly modify the resistance of the digital point.

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Boss, hello, thank you for your guidance. I am now using your method to slowly change the output voltage, and the pulse on FB has disappeared. Thank you!  Details Published on 2024-10-17 21:10
 
 
 

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maychang posted on 2024-10-15 18:18 [The voltage change moment mentioned above refers to the moment when the digital potentiometer changes its output resistance] You mean, the moment when the digital potentiometer value changes (that is,...

At present, it is found that there is a 2.2V pulse on FBX when the output voltage changes from high voltage to low voltage. At the beginning of debugging, it was found that there was a 4.75V pulse on FBX because R60 was not soldered. However, no pulses higher than 1.8V were seen on the digital signal lines of I2C and SDA. At present, it is found that several digital potentiometers and MCUs are burned. I don’t know whether it is directly related to the pulses higher than 1.6V on FBX.

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Please modify the circuit according to my suggestion on the 8th floor and then do a test.  Details Published on 2024-10-16 08:13
 
 
 

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xiaxingxing posted on 2024-10-15 21:40 At present, it is found that the output voltage has a high voltage to low voltage moment, there is a 2.2V pulse on FBX, and a 4.75V pulse on FBX was found at the beginning of debugging...

Please modify the circuit according to my suggestion on the 8th floor and then do a test.

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OK, I will connect the L pin next time I modify the version and give it a try. Thanks!  Details Published on 2024-10-17 21:14
 
 
 

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xiaxingxing posted on 2024-10-15 21:40 At present, it is found that the output voltage has a high voltage to low voltage moment, there is a 2.2V pulse on FBX, and a 4.75V pulse on FBX was found at the beginning of debugging...

2.2V may be 1.8V + ESD diode voltage drop. ESD diode of digital potentiometer H pin to VDD.

This overshoot is inevitable when stepping down the voltage. To reduce this overshoot, try adding C17, but it requires precise calculation, and C17 will affect the loop. The simplest way is to slowly change the resistance of the digital potentiometer, turn on the charge pump inside the 5395L, and add a clamp protection to the H pin in the subsequent circuit.

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Yes, if you want to modify the version, you need to add a clamping Schottky diode to the H pin, thank you!  Details Published on 2024-10-17 21:12
 
 
 

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Shawn.TAO posted on 2024-10-15 19:41 You can disconnect the Q1 MOS in the next stage, add a clamp protection to the digital potentiometer pin, and turn on the power supply before using it in the circuit. Why do you need 36V...

Boss, hello, thank you for your guidance. I am now using your method to slowly change the output voltage, and the pulse on FB has disappeared. Thank you!

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Shawn.TAO posted on 2024-10-16 14:36 2.2V may be 1.8V + ESD diode voltage drop. ESD diode of digital potentiometer H pin to VDD. This overshoot is inevitable when stepping down the voltage, reduce this...

Yes, if you want to modify the version, you need to add a clamping Schottky diode to the H pin, thank you!

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It is not necessary. You can try adding C17 to see how it works. If it doesn't work, you can add a capacitor at the bottom of the potentiometer to absorb the instantaneous high voltage.  Details Published on 2024-11-11 15:17
 
 
 

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