What are the requirements for op amps and power supplies for high voltage detection?

乱世煮酒论天下

What are the requirements for op amps and power supplies for high voltage detection? [Copy link]

 

As shown in Figure 1, this is a bus voltage detection circuit with a DC voltage of 1000V. If the positive and negative sides of the attenuation resistor are equal, then the voltage of the signal collected by the bus voltage and sent to the positive and negative input terminals of the op amp is also symmetrical about the bus voltage. However, in general, the ground potential of the bus voltage and the power supply voltage of the op amp are inconsistent, which makes it possible that the voltage sent to the positive and negative pins of the op amp is not symmetrical about the power supply voltage of the op amp. That is, the bus voltage collection point is placed at the high end, midpoint, and low end of the bus voltage. The simulation data results are as follows:

Midpoint sampling

High point sampling

Low-end sampling

High-end sampling

There is not much difference in the results. There are two points I don't understand. There is no significant difference when the sampling points are placed in different positions. What is the reason for this and how does it relate to the input impedance of the op amp?

The ground potential of the sampled voltage and the supply potential of the op amp are generally different. What effect will this have on the voltage input to the op amp pin?

maychang

[The ground potential of the sampled voltage is generally different from the power supply potential of the op amp]

In your simulation circuit, the sampled voltage does not have a definite potential at all.

乱世煮酒论天下

maychang posted on 2024-8-7 14:15 [The ground potential of the sampled voltage and the power supply potential of the op amp are generally different] In your simulation circuit, the sampled voltage has no definite potential at all. ...

I took the negative pole of the positive and negative busbars as the ground, and scanned the parameters of R4. The three values were 1 ohm, 1M ohm, and 10M ohm. The instantaneous analysis results are as follows, and there is no big difference in the results.

According to my understanding, this sampling circuit has something to do with the input resistance of the op amp. The positive and negative voltages are divided by the attenuation resistor and the op amp input resistance to the op amp pins. The bus voltage is shared by the specific size of the op amp input resistance. Assuming that the voltage attenuated to both ends of the op amp input pins is 1/1000 of the bus voltage, then the internal resistance of the op amp accounts for 1/1000 of the entire resistance attenuation network. After being amplified to 3 times to 3V through the feedback network, this involves the specific quantitative relationship between the potential of the negative pole of the strong current and the weak ground gnd. This circuit is problematic. It does not connect the negative pole of the strong point with the weak ground gnd. It should be pulled down to the weak ground gnd through a resistor at the positive input of the op amp.

乱世煮酒论天下

The question is, how is the ground of the detected signal connected to the ground of the detection circuit? To ensure that the voltage input to the positive and negative pins of the op amp is within the op amp power supply voltage range, try to distribute it at the midpoint of the op amp power supply voltage, and ensure that the voltage input to the op amp pin is around gnd when the positive and negative power supply is used. When the single power supply is used, ensure that the voltage input to the positive and negative pins of the op amp is around half the power supply voltage.

maychang

乱世煮酒论天下published on 2024-8-7 14:43 I took the negative pole of the positive and negative busbars as the ground, and scanned the parameters of R4. The three values were 1 ohm, 1M ohm, and 10M ohm. The instantaneous analysis results are as follows. There is no...

This circuit is problematic.

Rather than saying "there is a problem", it is better to say "it is wrong".

maychang

乱世煮酒论天下Published on 2024-8-7 15:04 The question is, how is the ground of the detected signal connected to the ground of the detection circuit? To ensure that the voltage input to the positive and negative pins of the op amp is in the op amp power supply...

[It's just a question, how does the ground of the detected signal establish a connection with the ground of the detection circuit? ]

In the circuit you simulated, the ground of the detected signal does not exist in the diagram at all. What connection is there?

maychang

乱世煮酒论天下Published on 2024-8-7 15:04 The question is, how is the ground of the detected signal connected to the ground of the detection circuit? To ensure that the voltage input to the positive and negative pins of the op amp is in the op amp power supply...

[To ensure that the voltage input to the positive and negative pins of the op amp is within the op amp power supply voltage range, try to distribute it at the midpoint of the op amp power supply voltage]

This idea is correct in direction, but not strict enough. Strictly speaking, it is to ensure that the potential of the two input terminals of the op amp is within the common mode allowable range of the op amp.

maychang

乱世煮酒论天下Published on 2024-8-7 15:04 The question is, how is the ground of the detected signal connected to the ground of the detection circuit? To ensure that the voltage input to the positive and negative pins of the op amp is in the op amp power supply...

[To ensure that the voltage input to the positive and negative pins of the op amp is within the op amp power supply voltage range, try to distribute it at the midpoint of the op amp power supply voltage]

To achieve this goal, in principle, a differential amplifier is used, with a large value of the resistors in series at the two inputs (these two resistors should be equal), but a fairly small value of the feedback resistor and the resistor from the non-inverting input to "ground" (op amp power supply ground) (these two resistors should also be equal). The potential of the two inputs is within the common-mode allowable range of the op amp, relying on the fairly small resistance from the non-inverting input to ground and the negative feedback at the inverting input.

乱世煮酒论天下

maychang posted on 2024-8-7 15:44 [To ensure that the voltage input to the positive and negative pins of the op amp is within the op amp power supply voltage range, try to distribute it at the midpoint of the op amp power supply voltage] To implement...

Make sure that the voltages at the two input terminals of the op amp are within the common-mode allowable range of the op amp. What determines the common-mode input voltage of the op amp? I have seen the equivalent input circuit diagram of the op amp, as shown below:

I read an article before. If you want to increase the common-mode input voltage range of the op amp, you can connect a large resistor in series between the two input pins of the op amp. That is, connect resistors in series between the Vp and Vn pins to increase the common-mode input voltage range. In fact, the common-mode input voltage of the op amp itself has not changed. It is the added series resistor that shares most of the common-mode voltage. For example, the AD629 op amp circuit in the figure below:

For the circuit composed of this op amp, a 380kΩ resistor is added to the two input pins. For the internal op amp, it is assumed that its common-mode input voltage is slightly lower than the power supply voltage. Assuming that the common-mode input voltage is 15V, plus the input and feedback resistors, the common-mode rejection voltage can be 15*380/20=280V. When using this op amp, the positive bias pin +Vref is connected to the bias voltage, and the negative bias pin is connected to -Vref at the output. The resistor of the -Vref pin is connected in parallel with another internal feedback resistor of 380kΩ, 21.1//380(k)=19.99kΩ, thus achieving symmetrical differential amplification under biased DC voltage.

Is there any other way to increase the common-mode input voltage of the op amp? In fact, it is still to use resistors to divide the voltage. The integrated op amp is just to integrate the resistors into the op amp.

maychang

乱世煮酒论天下published on 2024-8-7 17:47 Make sure the voltages at the two input terminals of the op amp are within the common-mode allowable range of the op amp. What determines the common-mode input voltage of the op amp? I have read the op amp's ...

[In fact, the resistor is still used to divide the voltage]

That's right.

maychang

乱世煮酒论天下published on 2024-8-7 17:47 Make sure the voltages at the two input terminals of the op amp are within the common-mode allowable range of the op amp. What determines the common-mode input voltage of the op amp? I have read the op amp's ...

[What determines the common-mode input voltage of the op amp?]

I guess what you want to ask is "what determines the common-mode input voltage allowed by the op amp".

"Common-mode input voltage" often refers to the common-mode input voltage that actually occurs.

The "common-mode input voltage allowed by the op amp" is determined by the structure of the op amp and the power supply voltage that powers the op amp.

luominxdy

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Gen_X

The biggest feature of this circuit is that the signal is floating, so the measurement has little to do with the high end and the ground end.

It just depends on how large the offset and zero point shift of the op amp are.

Within these "limits", there should be no difference.

This is only a theoretical measurement front end. In fact, high voltage always has a "ground", whether it is a virtual ground or not (through a symmetrical resistor connected to the center or induction to the earth, etc.), which leads to a large common mode input. This is inevitable, so the symmetrical high-impedance input method of the op amp is necessary, and certain protection measures are required at the positive and negative input ends of the op amp, otherwise direct "differential" is a completely dangerous practice.