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Don't worry about drilling, don't worry about drilling [Copy link]

Mr. High Speed member--Jiang Jie

The drill bit is cold, the board is cold, and seeing the via impedance remain high, Lei Bao's heart is getting colder and colder...

Lei Bao has been studying vias recently, and he has to learn related theories first: vias are an important impedance mutation point on the signal path. Compared with the characteristic impedance of the transmission line, vias are capacitive in most cases (note, not all), that is, the impedance will be low. The main factors affecting via impedance are aperture, anti-pad size, via stub length, and the presence or absence of non-functional pads.

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With the influencing factors that can be counted on one hand and several routine simulation projects successfully completed, Lei Bao thought he had a clear understanding of the via optimization method and couldn't help but feel a little proud. It happened that his master Chris had a big project on hand, so he volunteered to take over the task of via optimization.

This project is big because the board is big, big and thick, with a thickness of 5mm.

The master specifically reminded him that the board was thick and needed more work. In addition, according to the feedback from the board factory, the 8mil high-speed differential signal via hole can be drilled to ensure that the 8mil hole remains unchanged. Although it seemed like a light sentence, Lei Bao would later find out how heavy this information was. However, at that time, apart from sighing that the board factory's processing capabilities were really strong, he did not really realize what this data meant.

Setting up the layers, cutting the model, adding the back drill, digging the reverse disk, after this series of smooth little moves, Lei Bao was thinking about Subject 3 in his mind.

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The happy time did not last long. The impedance simulation results of the vias made Lei Bao doubt that he had seen it wrong.

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The via impedance I encountered before was always low, why is it so much higher this time? The differential trace impedance is 100 ohms, and the differential via impedance is close to 118 ohms?

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After confirming that there was no problem with the model, Leibao began to analyze the cause: the via impedance was high, indicating that the fringe field between the via and the plane layer was weak. So he reduced the anti-pad from a rectangular anti-pad to a smaller "football field" to see what the effect was.

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There is an effect, but it is not significant. The impedance at the via location is only reduced to 116 ohms.

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Lei Bao decided to change his thinking: the impedance is too large, which means the return path is large from the perspective of signal return, so he decided to reduce the distance from the signal via to the adjacent return ground hole.

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The via impedance is still high, 115 ohms, which is frustrating.

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At this point, Lei Bao felt exhausted, and sweat beads appeared on his forehead. When the master saw this, he thought it was time to take action, so he asked Lei Bao to increase the via diameter to 10mil.

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The impedance of the via was magically reduced. The final simulation was performed according to a 10mil drill hole diameter, which greatly reduced the difficulty.

But Lei Bao still had a lot of questions in his mind: Why is the impedance of the via higher this time? In addition, the board manufacturer has confirmed that the 8mil diameter via can ensure that the diameter remains unchanged after drilling, but the simulation parameters are changed to 10mil. Is this okay?

The master seemed to see through his thoughts and solved his doubts one by one: the impedance of the via is affected by its own parasitic capacitance and parasitic inductance. For the 8mil via, since the thickness of the board is usually not large, the via length is small and capacitive, and the impedance is lower than the trace, so the 8mil via is required to be 8mil per drill diameter to improve the impedance; now due to the large board thickness, the via impedance is high and difficult to optimize, so the opposite is done, increasing the size of the per drill diameter to reduce the via impedance.

As for the need to process 8mil vias according to 10mil drill hole diameter, just confirm with the board manufacturer in advance. The board manufacturer will definitely be happy: the drill hole diameter is increased, the thickness-to-diameter ratio is reduced, and the processing difficulty is greatly reduced, so why not?

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After the master's explanation, Lei Bao suddenly understood and learned a new trick.

Here comes the problem

What are the optimization methods for via impedance that you know?

This post is from PCB Design

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Great, great, great writing, great content sharing, great article~~~   Details Published on 2024-4-25 10:34
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This post is from PCB Design
 
 

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Great, great, great writing, great content sharing, great article~~~

This post is from PCB Design
 
 
 

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