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GD32 MCU frequently resets without turning on the watchdog [Copy link]

The chip used is GD32F305, the library is from ST, and the delay is a tick timer (searched online). The current phenomenon is that in the debugging stage (read protection is not enabled at the beginning of main, and the watchdog is not turned on), when a certain delay time is reached, it will reset. (It is not reset at the beginning of the delay. According to the debugging, it seems to reset when LSIRDY is ready, but the details are not clear). When entering the formal program, no reset occurs. What is the reason for this, please ask the experts?

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Could this be a chip design problem? Has the original poster solved the problem? It seems that many people have encountered this problem.  Details Published on 2024-11-14 17:41
 

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Try initializing the tick clock and see if it still resets.

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GD32F305 should be the same as GD32F303. I have not encountered this problem with GD32F303. It is probably a program problem. It is recommended to use GD's own routine library for comparison.

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Also, when using the 30X series, it seems that you need to pay attention to some things when transplanting, it is not possible to transplant directly

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在爱好的道路上不断前进,在生活的迷雾中播撒光引

 
 

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If the watchdog is not turned on, it will reset? I can only say that the original poster is wrong.

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Personal signature上传了一些书籍资料,也许有你想要的:http://download.eeworld.com.cn/user/chunyang
 
 

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You may need to re-adjust the clock configuration.
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GD uses ST's standard library, and sometimes strange problems may occur. I have encountered them!

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This post was last edited by damiaa on 2024-2-22 09:14

It is not just the watchdog reset. Power reset, reset IO, etc. are all possible. It is said that you can do this: print the value of the RCU_RSTSCK register when powering on, and you can see the result after a few times.

void Howrest(void)
{

unsigned long val = RCU_RSTSCK;

printf("\r\nRCU_RSTSCK = %lx\r\n",val);//Compare one bit at a time
rcu_all_reset_flag_clear();

}

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Did you solve this problem? I also have this problem. I did not enable the watchdog, but the watchdog reset occurred frequently. I used gd32F103
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Could this be a chip design problem? Has the original poster solved the problem? It seems that many people have encountered this problem.
This post is from GD32 MCU
 
 
 

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