Buck output overshoot causes and improvement measures

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Buck output overshoot causes and improvement measures [Copy link]

Overshoot refers to a peak voltage that exceeds the set voltage, usually in the form of a spike pulse. When using power products, poor contact of the input switch and hot plugging of the input may cause output overshoot. If the output overshoot exceeds the maximum withstand voltage of the back-end device, it may cause damage to the back-end device.

1. Causes of output overshoot

The generation of overshoot has a lot to do with the power-on method. When the input voltage rises smoothly, there will be no overshoot at the output. When hot-plugging or the input contact is poor, the input voltage will suddenly rise from zero or rise again after a large drop. In these two cases, if the input voltage change rate exceeds the system loop response speed, the output voltage will be temporarily higher than the set value, which is output overshoot.

2. Output overshoot improvement measures

1. Add CFF capacitor

Adding CFF capacitor can effectively suppress the output overshoot caused by the step increase of input voltage. Refer to the circuit in Figure 1, set the output to 5V according to the input of 12V, and connect the output terminal to 51R cement resistor; compare the input and output voltage waveforms without 33nF capacitor and the input and output voltage waveforms after adding 33nF capacitor. (The position of CFF capacitor is shown in the blue dotted box in Figure 1).

Comparing the waveforms in Figure 1 and Figure 2, it can be seen that the upper voltage divider resistor connected in parallel with a 33nF ceramic capacitor can effectively suppress output overshoot.

2. Add an undervoltage shutdown circuit

According to the circuit in Figure 1 (CFF capacitor has been added), input 12V, set the output to 5V, and connect the output terminal to a 51R cement resistor. When the input terminal voltage drops rapidly and then rises in steps, the input and output voltage waveforms are tested.

As shown in the waveform of Figure 4, when the input voltage drops rapidly and then rises in a step, adding the CFF capacitor may not completely eliminate the output overshoot. We can solve this problem by adding an undervoltage shutdown circuit. The principle is: the minimum operating voltage of the chip is set by the voltage regulator. When the input voltage drops and is less than the voltage regulator VZ value, the chip does not work. When the input voltage rises to a value higher than the voltage regulator VZ value, the chip works again. This allows the chip to stop working when the input voltage fluctuates greatly, avoiding unstable output voltage. The undervoltage shutdown circuit is shown in the blue dashed box in Figures 5 and 6. The value range of DZ1 is: 1.2*VOUT＜VZ＜VIN.

Use the above undervoltage shutdown circuit to test the input and output voltage waveforms when the input voltage drops rapidly and then rises in steps.

It can be seen from the waveforms in Figures 7 and 8 that the output overshoot can be effectively suppressed by using the undervoltage shutdown circuit.

chejm

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