Current sampling

QWE4562009

Current sampling [Copy link]

 

Current sampling

The load current will pass through a GND and a sampling resistor 0.5R back to the system main GND. The problem now is that when the load is turned off, the op amp output voltage is even greater. When the load is turned off, the current is more than 200 mA greater than when the load is connected. Is there something wrong with this differential sampling circuit? Please advise

ph19900507

If you use completely open-loop amplification, how do you sample?

lansebuluo

Is this related to the bias current return path?

zhaoyanhao

Your open loop has no negative feedback. If it is done properly and does not oscillate, it is just a comparator. How do you get an extra 200mA?

QWE4562009

ph19900507 posted on 2023-1-17 09:12 How do you sample if you are doing a completely open-loop amplification?

The current flows from PGND back to the main GND through the sampling resistor, and the high voltage terminal is connected to the in-phase input terminal 3 of the op amp. This is a in-phase proportional amplifier circuit. The voltage across the R428 resistor is amplified! The amplification factor depends on the feedback resistor connected across pins 1 and 2.

QWE4562009

zhaoyanhao posted on 2023-1-17 09:40 Your open loop has no negative feedback. If it is done well and does not oscillate, it is just a comparator. How do you get an extra 200mA?

Logically, no matter how the current flows, it needs to return to the main GND and must pass through the sampling resistor. At this time, it is understandable that the layout affects the accuracy a little bit. If it is the opposite, it is not logical.

QWE4562009

lansebuluo posted on 2023-1-17 09:30 Is this related to the bias current return path?

I just don't understand. I want to use the current sampling chip directly. I don't know if there will be the same problem.

QWE4562009

ph19900507 posted on 2023-1-17 09:12 How do you sample if you are doing a completely open-loop amplification?

The voltage drop is too small. The current is 150mA, and the sampling resistance is 0.5R, so the voltage drop is 0.075V, which is amplified by 33 times, that is, 2.475V. This is when there is a load, and it will soar to this value when there is no load. It is random.

zhaoyanhao

QWE4562009 Published on 2023-1-17 11:02 The current flows from PGND back to the main GND through the sampling resistor, and the high voltage terminal is connected to the in-phase input terminal 3 of the op amp. This is a in-phase proportional amplifier circuit ...

Where is the feedback resistor between your 1 and 2 pins? Even if there is one, it is a normal proportional amplification. Your circuit should involve the problem of op amp input impedance matching, because you are actually sampling current, and your input current is added to the feedback loop. It is recommended to add a follower circuit between your sampling resistor and the amplifier circuit to match the impedance. You can simulate it.

QWE4562009

zhaoyanhao posted on 2023-1-17 14:16 Where is the feedback resistor between your 1 and 2 pins? Even if there is, it is a normal proportional amplification. Your circuit should involve the problem of op amp input impedance matching...

Could you please draw a sketch and post it? I don't understand what you mean.

zhaoyanhao

QWE4562009 posted on 2023-1-17 14:49 Please draw a sketch and post it. I don't understand what you mean.

Are you sure your circuit is like this? I have no problem with the simulation

zhaoyanhao

QWE4562009 posted on 2023-1-17 14:49 Please draw a sketch and post it. I don’t understand what you mean

My suggestion is this

zhaoyanhao

fenglm posted on 2023-1-18 08:56 Good information can be downloaded and saved for future use. It's really good.

Are there still pirates in this forum?

LuJianchang

There is something wrong with your differential amplifier circuit. At least the resistor ratio should be correct, right? You can refer to the circuit below.

hungchou

First, make sure what INA data you are using?

Generally, there are three OPs inside the INA to form a differential amplifier, and there is usually a single gain setting resistor.

Details can only be found by looking at the DATASHEET

It is best to list the peripheral circuits as well.

At present, this information alone cannot determine

QWE4562009

LuJianchang posted on 2023-1-19 13:37 There is a problem with your differential amplifier circuit. At least the resistor ratio should be correct, right? You can refer to the circuit below.

Is it to magnify the difference between UI1 and UI2?

QWE4562009

hungchou posted on 2023-1-26 11:27 First determine the INA data you are using? Generally, there are three OPs inside the INA to form a differential amplifier, and there is usually a single amplification setting resistor...

You are from TW, right?

QWE4562009

zhaoyanhao posted on 2023-1-17 15:10 My suggestion is this

This doesn't seem to be differential amplification. Differential amplification amplifies the difference between the input terminals.

LuJianchang

QWE4562009 posted on 2023-1-31 11:19 Is it to enlarge the difference between UI1 and UI2

First, R3=R1, R4=R2; Vo=R2/R1*(Vi2-Vi1)

QWE4562009

LuJianchang posted on 2023-1-31 16:50 First, R3=R1, R4=R2; Vo=R2/R1*(Vi2-Vi1)

Well, if the maximum voltage of the op amp is 5V, do we need both Vi2 and Vi1 to be less than 5V? Or does it only need the difference between Vi2 and Vi1 to be less than 5V?