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A new generation of high-frequency and high-current buck chips [Copy link]

 


The global economy is knocking on the door of the era of communications and cloud computing. The core components of optical modules and CPUs are constantly upgraded, and internal chips are constantly updated and iterated, which will have an impact on the most cutting-edge technology. Silergy has launched a new generation of high-frequency and high-current synchronous buck converter SY72220 to provide more optimized power management solutions for communications and cloud computing equipment.

* 10MHz 20A power solution area

SY72220

10MHz, 20A Synchronous Buck Regulator

◆ Input voltage range: 2.8V ~ 5.5V

◆ Output current: 20A

◆ I 2 C adjustable frequency: 3MHz/5MHz/10MHz

◆ I 2 C adjustable output voltage: 0.4V~1.5V

◆ Multi-time Programmable Memory (MTP Memory)

◆ Integrated 2mΩ NMOS synchronous rectifier

◆ Accurate ±1% internal voltage reference

◆ Ultra-fast line and load transient response

◆ Built-in differential circuit to sample output voltage

◆ Built-in soft start

◆ Smooth pre-bias start-up

◆ Thermal warning and thermal shutdown protection with hysteresis function

◆ Integrated UVLO/UVP/SCP/OCP

◆ Compact package: QFN3×4-16

Solution Overview

* SY72220 typical application diagram

SY72220 is a high-frequency synchronous buck converter that provides a maximum continuous output current of 20A. Its output voltage is online adjustable from 0.4V to 1.5V.

SY72220 can operate stably and efficiently within the input voltage range of 2.8V to 5.5V, and is suitable for various low-voltage systems. The SY72220 control loop has a high-gain-bandwidth error amplifier, which achieves fast load transient response, and the dynamic response delay does not exceed 50ns. Its operating frequency can be configured to 3MHz, 5MHz or 10MHz through I2C .

SY72220 has input and output overvoltage protection (OVP), output undervoltage protection (UVP) and short circuit protection (SCP), as well as cycle-by-cycle overcurrent protection (OCP), which improves system reliability. The EN enable pin and integrated UVLO strictly control the turn-on of the buck converter. Smooth pre-bias startup limits the startup inrush current to the greatest extent.

The ultra-high switching frequency of SY72220 enables the use of extremely small inductors and capacitors, meeting the design requirements for performance parameters such as output ripple, greatly reducing the space of PCB layout, and providing a more compact solution for terminal equipment.

The SY72220 is available in a customized 16-pin QFN3*4 package with a large PGND pad soldered to the PCB to achieve extremely low junction-to-board thermal resistance.

Minimalist BOM design, compact PCB layout

* Size comparison of 10MHz solution vs 1MHz solution

As the performance of smart terminal devices continues to improve, the design space of the devices is becoming more valuable. SY72220 uses a compact QFN package with a chip size of only 3mm×4mm. The switching frequency of SY72220 is as high as 10MHz. With smaller output capacitors and inductors, the PCB area is only 1/4 of the 1MHz switching frequency solution, reducing BOM costs and greatly improving the power density of the overall solution.

Very high loop bandwidth, ultra-fast dynamic response

* SY72220 typical load transient response

SY72220 supports ultra-fast load transient response, and the dynamic response delay does not exceed 50ns. Its high loop bandwidth achieves smaller output voltage drop and overshoot during fast load jumps, providing more stable power output for the device.

Wide operating frequency range and high conversion efficiency

* SY72220 typical operating point efficiency curve (Vin=3.3V, Vo=1V)

SY72220 can select 3MHz, 5MHz or 10MHz switching frequency through I 2 C. SY72220 minimizes the power loss caused by high frequency by optimizing the speed and on-resistance of the internal power tube. At a switching frequency of 3MHz, the peak efficiency of the solution can reach more than 90%.

Application Scenario

Application Example 1

Mobile phones and other handheld electronic devices have limited internal space. As CPU computing performance continues to improve, power management solutions with higher power density and ultra-fast load jump response are needed. This is a typical application scenario for the SY72220 chip with a 10MHz operating frequency.

* Mobile phone internal processor image

The output inductor and capacitor parameters are designed based on a set of actual application conditions.

Vin=3.6V, Vo=1V, Iomax=16A, load step up: 0.1A-0.5*Iomax/100ns, load step down: 0.5*Iomax -0.1A/100ns, ΔVout(ac)<=±30mV(± 3%).

First determine the inductor value, generally based on the inductor ripple being 20%~40% of the full-load output current.

Vo=L*ΔIL/toff, ΔIL=30%*Iomax=4.8A.

Lthoeory=Vo*toff/ΔIL≈1*77ns/4.8≈16nH.

The available inductance values closest to theoretical calculations are 17nH (CLT32-17N) and 15nH (HPLE041T-15NNSF).

Secondly, consider meeting the AC ripple requirements for load transitions.

◆ When jumping from a light load to a heavy load, the ΔVundershoot of the capacitive load voltage is determined by the output capacitance, load change rate, loop response delay, inductance, input and output voltage values, and the maximum duty cycle. Ignoring the response delay, the charge conservation from the step jump moment to the moment when the output voltage is at its lowest point can give the ΔVundershoot expression:

* 0A→8A load step jump simulation and theoretical calculation

Substitute the parameters Vin=3.6V, Vo=1V, ΔIout=8A.

L=15nH, Dmax=ton/(ton+toff_min)=0.46.

When ΔVundershoot≤30mV is required, Co should be>=24μF.

◆ When jumping from heavy load to light load, the ΔVovershoot of the capacitive load voltage is determined by the output capacitance, inductance and output voltage. Make the same assumptions, and consider that the lower tube can be turned on all the time when the output is charged high, and the charge conservation from the step jump moment to the highest point of the output voltage, the ΔVovershoot expression can be obtained:

* 8A→0A load step jump simulation and theoretical calculation

When ΔVovershoot≤30mV is required, substituting the parameters, Co needs to meet>=16μF.

At the same time, the output voltage ac ripple requirement of ±30mV should be met, and the output capacitance should be no less than 24μF.

Finally, consider the DC ripple of the output voltage. The resonant frequency of an ordinary two-terminal multilayer ceramic capacitor (MLCC) is about 2~3MHz, and its equivalent series parasitic inductance will increase sharply after the resonant frequency, making the output voltage ripple larger. The three-terminal low ESL multilayer ceramic capacitor has an internal structure equivalent to multiple current paths in parallel, which greatly reduces parasitic parameters such as ESL and ESR. In order to further reduce the output voltage ripple, it is recommended to use a three-terminal capacitor for switching frequencies of 5MHz and above.

Taking into account the AC and DC ripple requirements of the output voltage, the output capacitor uses six three-terminal capacitors NFM15PC435R0G3D (4.3μF, 4V, 0402) in parallel.

As can be seen from the table below, the volume of 10MHz output passive components is less than one-tenth of that of 1MHz, which greatly improves the power density.

* Output passive component design that meets CPU power supply application conditions

The measured load jump output voltage ac ripple is ≤±30mV.

*Load jump waveform

At 10MHz operating frequency, the output voltage dc ripple is ≈5mV in the full load range.

* 10MHz output voltage ripple

When the chip works at half load and reaches thermal equilibrium, the chip temperature rise does not exceed 40°C.

* Thermal imaging

Application Example 2

* Data center optical module system block diagram

The 3.3V power rail of the optical module system is a typical application scenario for the SY72220 chip's 3MHz and 5MHz operating frequencies. The main requirements for the power chip are high integration, high efficiency, and low output voltage ripple. The module based on the SY72220 chip can be designed through a three-dimensional framework to integrate all passive components except the output capacitor, which is more conducive to the power design of modular systems such as optical modules.

* Module concept diagram based on SY72220

Considering the inductor height and the number of output capacitors, the output inductor and capacitor values that meet a set of optical module application conditions are as follows:

* Meet the output inductance and capacitance values of the optical module system at different frequencies

The output voltage dc ripple meets ≤5mV at both switching frequencies.

*3MHz&5MHz output voltage ripple test

(Vin=3.3V, Vo=0.95V, Iout=15A)

At the two operating frequencies of 3MHz and 5MHz, the full load efficiency can reach more than 85%, and the chip temperature rise does not exceed 50℃.

*3MHz&5MHz temperature rise and efficiency curve

(Vin=3.3V, Vo=0.95V, TA=27℃)

Reprinted from: https://mp.weixin.qq.com/s/DWMzBRcyXZeYnC6FZRezhg

This post is from Power technology

Latest reply

You read it wrong. Full integration only consumes 3 watts of heat at full load. Just keep it close to the ground.  Details Published on 2022-12-4 18:32
 
 

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Amazing! Such a small chip can actually achieve 20A current output

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Yeah, I think it’s amazing too!  Details Published on 2022-12-2 10:13
 
 
 

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Why can't I find this chip on the official website? Where did you find the information? Send me a link to see it.

This post is from Power technology
 
 
 

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How to design heat dissipation for such high current?

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The heat doesn't seem to be serious, but I don't know how much it will heat up when fully loaded.  Details Published on 2022-12-2 10:20
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在爱好的道路上不断前进,在生活的迷雾中播撒光引

 
 
 

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Very high frequency, 10MHZ, not bad,

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Yeah, the performance feels really good!  Details Published on 2022-12-2 10:21
 
 
 

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This post was last edited by damiaa on 2022-12-2 09:40

I passed by SY6120. Batch. High cost performance, easy to use and stable

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Can you share your experience?  Details Published on 2022-12-2 10:21
 
 
 

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se7ens posted on 2022-12-1 21:37 It’s amazing that such a small chip can achieve a 20A current output

Yeah, I think it’s amazing too!

This post is from Power technology
 
 
 

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LMYBIGBOSS posted on 2022-12-1 22:05 Why can't I find this chip on the official website? Where did you find the information? Send a link to take a look

Silergy WeChat official account. Since it is a new product, the official website may not have been updated yet.

This post is from Power technology
 
 
 

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Qintianqintian0303 posted on 2022-12-2 07:32 How to design heat dissipation for such a high current

The heat doesn't seem to be serious, but I don't know how much it will heat up when fully loaded.

This post is from Power technology
 
 
 

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fxyc87 posted on 2022-12-2 09:21 Very high frequency, 10MHZ, not bad,

Yeah, the performance feels really good!

This post is from Power technology
 
 
 

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damiaa posted on 2022-12-2 09:38 Passing by using SY6120. Batch. High cost performance, easy to use and stable

Can you share your experience?

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It's fine if you follow the official recommended method. I've tried it in batches. No problem.  Details Published on 2022-12-2 10:27
 
 
 

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wangerxian posted on 2022-12-2 10:21 Can you share your experience?

It's fine if you follow the official recommended method. I've used it in batches. There's no problem.

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I come to water points
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Can you share your experience?

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The controller is mainly troublesome to make, it needs electricity, and its efficiency is average.


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You read it wrong. Full integration only consumes 3 watts of heat at full load. Just keep it close to the ground.


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Yes, 3W heating should not be too serious.  Details Published on 2022-12-5 09:11
 
 
 

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hahajing posted on 2022-12-4 18:32 I read it wrong. The full integration only has a thermal power consumption of 3 watts at full load. Just keep it close to the ground and do it well

Yes, 3W heating should not be too serious.

This post is from Power technology
 
 
 

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