Watch the video for a reward | Play with DP1.4 source physical layer consistency test

EEWORLD社区

Watch the video for a reward | Play with DP1.4 source physical layer consistency test [Copy link]

How to test DisplayPort interface?

DisplayPort testing can be divided into three types according to the different types of devices under test: Source test, Sink test and Cable test. According to the different devices under test, CTS specifies the corresponding test points. TP1 is the pin end of the Source chip, TP2 is the connector end of the Source, TP3 is the connector end of the Sink, TP3_EQ is the equalized TP3, and TP4 is the pin of the Sink chip. Since the chip pins are not convenient to detect, the test point of the DP Source device is TP2, and the DP Sink test point is TP3. The following figure is the definition of the DP test point.

DisplayPort Source Test Challenges and Related Technical Specifications

DP testing needs to be tested at different rates, different code types, different pre-emphasis, different swings, different lanes, and SSC switches. The following figure shows the configuration parameters for DP1.4 testing. Each lane of DP1.4 needs to collect 126 waveform data for analysis, and X4 Lanes needs to collect 504 waveform data for analysis, which takes several hours to complete the test. Connect the DP signal of the Source device to the channel of the oscilloscope through the DP test fixture, and use the DP physical layer consistency test software to control the oscilloscope to collect data and analyze the collected signals.

Want to see the complete DisplayPort 1.4 Aux signal and source physical layer consistency test? Go to Shuige's Secret Book 2 to view more test videos. I wish you a better chance of getting a JD card!

Go to view>>>

se7ens

Produced by Shui Ge, support it, mark it first and then watch it