[Synopsys IP Resources] AI+ML brings the long-running battle of chip verification to an end ahead of schedule

arui1999

[Synopsys IP Resources] AI+ML brings the long-running battle of chip verification to an end ahead of schedule [Copy link]

In the process of functional verification, usually 60% of the time is spent on test platform development and debugging, and the remaining 40% of the time is spent on test platform construction and coverage convergence. If we have a way to shorten the coverage convergence time while accurately finding all bugs, the efficiency of developers will be greatly improved.

Is there really such a method?

As chip designs become larger and more complex, chip verification typically takes thousands of hours of CPU processing time and convergence time is longer than before, putting new products on the market under greater time pressure and cost.

So how can we achieve “left shift” in the chip verification process while accelerating coverage convergence?

Today, we will focus on machine learning technology and discuss how it can help developers find errors earlier (including corner cases), achieve faster coverage convergence, and shorten functional verification cycles.

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Jacktang

Coverage convergence is said to be computationally and labor-intensive, requiring heavy manual work to achieve the set goals.