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[National Technology N32G457 Review] RT_Thread Studio SPI Filling the Pit [Copy link]

 This post was last edited by lugl4313820 on 2022-2-7 19:30

The problem of NSS not being able to be lowered was solved this morning:

Check the configuration function of drv_spi.c:

Combined with the debugging data:

Found that CLKPOL is 2, and the parameters I passed in are:

cfg.mode = RT_SPI_MODE_MASK | RT_SPI_MODE_1 | RT_SPI_MSB ; //Configure as spi master, MODE1 (CPOL=0,CPHA=1)

I feel like there is a problem with the two coordinations: the configuration of drv_spi.c is:

switch(configuration->mode & RT_SPI_MODE_3)
{
case RT_SPI_MODE_0:
SPI_InitStructure.CLKPOL = SPI_CLKPOL_LOW;
SPI_InitStructure.CLKPHA = SPI_CLKPHA_FIRST_EDGE;
break;
case RT_SPI_MODE_1:
SPI_InitStructure.CLKPOL = SPI_CLKPOL_LOW;
SPI_InitS structure.CLKPHA = SPI_CLKPHA_SECOND_EDGE;
break;
case RT_SPI_MODE_2:
SPI_InitStructure.CLKPOL = SPI_CLKPOL_HIGH;
SPI_InitStructure.CLKPHA = SPI_CLKPHA_FIRST_EDGE;
break;
case RT_SPI_MODE_3:
SPI_InitStructure.CLKPOL = SPI_CLKPOL_HIGH;
SPI_InitStructure.CLKPHA = SPI_CLKPHA_SECOND_EDGE;
break;
}

Is it possible not to pass all three parameters together, because the following configuration parameters directly specify several parameters:

/*!< SPI configuration */
SPI_InitStructure.DataDirection = SPI_DIR_SINGLELINE_TX;
SPI_InitStructure.SpiMode = SPI_MODE_MASTER;
SPI_InitStructure.CLKPHA = SPI_CLKPHA_SECOND_EDGE;
SPI_InitStructure.NSS = SPI_NSS_SOFT;
SPI_InitStructure.CRCPoly = 7;

So I changed the mode configuration to:

cfg.mode = RT_SPI_MODE_1;

After downloading, check the timing diagram as follows:

It feels like we have made another step forward, the data sent by spi is already available.

But only one bit of data was sent, and it was not the number I sent.

I looked back and found that the order of data transmission was not specified:

Updated to:

cfg.mode = RT_SPI_MODE_1 | RT_SPI_MSB;

The timing diagram after downloading is as follows:

The data sent out is correct, but it is stuck at FlagStatus SPI_I2S_GetStatus(SPI_Module* SPIx, uint16_t SPI_I2S_FLAG);.

It seems there is a configuration problem somewhere.

After debugging again, I found that it was stuck at the waiting for reception mark. I originally sent the command but only sent it, but did not receive it. This...

Go back and modify the configuration function of drv_spi.c again:

/*!< SPI configuration */
SPI_InitStructure.DataDirection = SPI_DIR_DOUBLELINE_FULLDUPLEX; //Change to duplex again

Then send successfully:

So far, the spi transmission has been adjusted:

Final summary:

1. The structure of receiving cs in configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration) of drv_spi.c should be set as follows:

struct n32_hw_spi_cs
{
GPIO_Module* GPIOx;
uint32_t GPIO_Pin;
};

Also, the mode parameter passed in cannot be added to the master-slave mode.

Only can be sent:

cfg.mode = RT_SPI_MODE_1 | RT_SPI_MSB; these two parameters

Finally, upload the project. I hope this will give some suggestions to those who want to use RT_Thread Studio with N32G45.

Adjust the transmission rate to 70M and test it. The actual working frequency is 50M as the maximum frequency.

N32G45_SPI_TEST.7z

6.27 MB, downloads: 11

This post is from Domestic Chip Exchange

Latest reply

Can't the mode parameter passed in in the final summary be added to the master-slave mode? Thank you for the suggestion   Details Published on 2022-2-8 07:25
 
 

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Can't the mode parameter passed in in the final summary be added to the master-slave mode?

Thank you for the suggestion

This post is from Domestic Chip Exchange

Comments

Actually, this drv_spi.c driver is provided by netizens. Currently, I have not seen any drv_spi.c driver provided by National Technology. It is hard-coded in drv_spi.c that it can only work in master mode. Many configurations can only be modified manually, including NSS mode.  Details Published on 2022-2-8 09:54
 
 
 

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Jacktang posted on 2022-2-8 07:25 Can't the mode parameter passed in the final summary be added to the master-slave mode? Thank you for your suggestion

Actually, this drv_spi.c driver is provided by netizens. Currently, I have not seen any drv_spi.c driver provided by National Technology. It is hard-coded in drv_spi.c that it can only work in master mode. Many configurations can only be modified manually, including NSS mode.

This post is from Domestic Chip Exchange
 
 
 

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