Newbie Guide丨FETT507-C Core Board Pin Function Modification Guide

小螃蟹呀

Newbie Guide丨FETT507-C Core Board Pin Function Modification Guide [Copy link]

The CPU of the FETT507-C core board is a quad-core Cortex-A53 with a main frequency of 1.5GHz; the GPU is a G31 MP2; the core board integrates 2GB DDR3 RAM and 8GB eMMC ROM, and can run Android, Ubuntu, and Linux operating systems smoothly. It has high performance, and its performance is improved by more than 50% compared to the FETA40i-C core board with the same CPU as Allwinner.

Since the launch of Feiling embedded FETT507-C core board, its new users have been increasing day by day, but for those who have just come into contact with the FETT507-C core board, they are not familiar with the kernel content and may find it time-consuming and laborious to develop. If you want to develop your own baseboard, you need to modify the pin function configuration to adapt to the interface function of your own baseboard.

Today, I will first modify the UART2 pin function and take you to understand the whole process of pin modification.

Pin function multiplexing ideas:

1. Confirm which pins are needed for the new function and what functions these pins were originally used for

2. Remove the original function from using these pins (turn off the function or change the pins)

3. Add new functions and use these pins

Let's take T507 adding a two-wire serial port UART2 as an example and do it in practice.

0 1

Confirm the pins required for UART2

Open the T507 hardware data and find the FETT507-C core board pin function multiplexing table

The path is: Hardware Information\User Manual\FETT507-C Core Board Pin Function Multiplexing Table.xlsx

Search for UART2 in the table and you will find three groups of available pins, which are used on TWI4, I2S3 and the network port respectively.

Pin Name	FETT507-C default function	Reusable functions
PG15	PG-TWI4-SCK	UART2_TX
PG16	PG-TWI4-SDA	UART2_RX
PH5	H_I2S3_MCLK	UART2_TX
PH6	H_I2S3_BCLK	UART2_RX
PI5	RGMII_RXCTL/RMII_CRS_DV	UART2_TX
PI6	PHYRSTB	UART2_RX

Here, I choose PG15 and PG16, which are the pins used for the original I2C4 function. This completes the first step, confirming the pins to be used and the default functions of the pins.

0 2

Remove the original function of these pins

Open the source code and first understand the device tree file of T507:

OKT507-linux-sdk/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/OKT507-C-Common.dtsi

Function configuration device tree 2

OKT507-linux-sdk/kernel/linux- 4.9/arch/arm64/boot/dts/sunxi/sun50iw9p1.dtsi

Function configuration device tree 1

OKT507-linux-sdk/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw9p1-clk.dtsi

Clock device tree

OKT507-linux-sdk/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw9p1-pinctrl.dtsi

Pin multiplexing device tree

Open sun50iw9p1-pinctrl.dtsi and search for TWI4 to find the default pin configuration. You can see that PG15 and PG16 are already in use.

Find the TWI4 function configuration. In line 807 of sun50iw9p1.dtsi, you can see the called pin configurations twi4_pins_a and twi4_pins_b

In line 352 of OKT507-C-Common.dtsi, we can see that twi4 is mounted with a touch chip. Here we turn off TWI4 and change the TWI4 status to status = "disabled";

At this point, we have turned off TWI4's use of pins PG15 and PG16. At the same time, TWI4 cannot be used and the touch chip cannot be recognized.

0 3

Add a serial port and use the PG15 and PG16 pins

First open sun50iw9p1-pinctrl.dtsi, search for UART2, and find the default pins of UART2, which are PH5, PH6, PH7, PH8 by default

We make modifications and change the pins and configuration to PG15 and PG16. The modified pins are shown in the figure

Open sun50iw9p1.dtsi and find the function configuration of UART2.

You can see that uart2_type is set to 4, which is a four-wire serial port, and is changed to 2, which is a two-wire serial port.

Then we turn on UART2 and change the UART2 status to status = "okay";

So far we have configured the UART2 pins and enabled the UART2 function.

Of course, the development board has UART0, UART1 and UART5 enabled by default, so the driver is already configured by default. You only need to compile and package the source code to get the image with UART2 added.

The article ends here. Do you have a preliminary understanding of the pin function modification of the FETT507-C core board? I hope this can provide some help for your development process.

Although the source code content of different platforms is different, the modification ideas are the same: What pins are needed? What is the original function of the pins? What functions are to be done? First understand the purpose, and then have a simple understanding of the source code structure. In this way, you can easily modify it independently.

Jacktang

Why is the use of pins PG15 and PG16 by TWI4 turned off? At the same time, TWI4 cannot be used and the touch chip cannot be recognized?

What is the reason?

小螃蟹呀

Jacktang posted on 2021-12-5 21:23 Why is the use of pins PG15 and PG16 by TWI4 turned off, and TWI4 cannot be used at the same time, and the touch chip cannot be recognized? What is the reason?

I think I should search for Feiling Embedded and ask their customer service about this question~