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It’s hard to believe that this pair of high-speed signals changed the vias so many times!!! [Copy link]

Author: Huang Gang, a member of Yibo Technology Expressway Media

PCB engineer: "There are no more layers to go. These pairs of 10G signals need to change layers several times and make four vias before they can go through!"

SI engineer: "..."

I wonder if the fans who do PCB design have the difficulties mentioned above? Because the boss or customer has very high cost requirements, there are only a few layers, and there are a lot of high-speed signals. Not only are there a lot of them, but they are also very unsmooth. There are crossovers, which means that you may need to change vias several times in the middle. However, the rate is not low, and good signal integrity is required. When you use trembling hands to pull these pairs of high-speed signals that have changed vias 4 or 5 times, even you feel that the signal quality will be down! ! !

The key is that your company does not have a colleague who can do simulation verification, and the design requirements of your board clearly state: from the sending chip to the receiving chip, only... 2 vias are allowed at most! Yes, you read the design guide correctly, it is 2!

At this time, you may have the following two mentalities. Either you are sad silently by yourself, or you may be more extreme and want to slam the great god who made this rule. Of course, you can only think like this in your heart!

But since the problem has arisen, the routing cannot be completed without changing the vias. Mr. High Speed can only help you see if it is definitely not okay to change the vias for the high-speed signal a few more times!

Fans have long known that high-speed signals generally like to use actual test results to answer such questions that go beyond the design rules! So High Speed Signal started the design and production of a new test board, in which the scenario of this problem was built into the design board, which is as follows!

This object to be tested includes a layer-changing routing structure from one via to 4 vias. Of course, Mr. High Speed also made a reference line (REF line), which is a simple routing without vias to compare with their 4 cases.

After a rather "long" design, processing and testing, Mr. Gaosuo got their first-hand test results. I wanted to say a few more words about theory, but I believe that fans can't wait to see the comparison results, so we will put the theory aside for later.

Let's take a look at the test results of these cases. We tested the high frequency of 40GHz, and their return loss and insertion loss respectively. There is no obvious difference in return loss, which shows that the impedance of the via is well optimized. Adding layer-changing vias will basically not bring too much impedance mismatch, which will lead to a deterioration in return loss. But the difference can be seen from the insertion loss. After 20GHz, the loss effect of adding a via will become obvious, especially after 30GHz, the energy radiation and loss of the via itself will become serious, which is also expected.

Of course, some fans may not understand the above frequency domain loss curves, so we will continue to share the test results with you using the time domain method. We transmit 10G signals on the above via layer switching links, and we use the time domain eye diagram to see their impact.

So we get the eye diagram results of the above 5 cases. From the results, we can see that from REF to the 4 layer-changing vias, we can see that the eye height of the 10G signal eye diagram decreases from 845mV to 803mV, but overall it will not have a particularly large impact on the performance.

Why is the eye diagram of the 10G signal not very different from the eye diagram? Because when we go back to our insertion loss, there is indeed little difference at the 10G position. The small difference in the frequency domain can actually correspond to the small difference in the time domain!

To summarize the core content of this article, Mr. Gaosuo has this view on the performance of high-speed signals after multiple layer-changing vias from his own test board: adding one more optimized layer-changing via will not have a significant impact on the performance of high-speed signals! But the premise is very important, that is, the "optimized" layer-changing via! Once again, it is an optimized via!

This post is from PCB Design

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The most stringent requirement is to give priority to signals, and not leave them until there is no room left. If you don’t understand, learn more.   Details Published on 2021-10-30 20:42
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The author's conclusion: This is how the performance of high-speed signals after multiple layer-changing vias is viewed: adding one more optimized layer-changing via will not have a significant impact on the performance of high-speed signals! But this premise is very important, that is, the "optimized" layer-changing via! Once again, it is an optimized via!

This post is from PCB Design
 
 

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The most stringent requirement is to give priority to signals, and not leave them until there is no room left. If you don’t understand, learn more.

This post is from PCB Design
 
 
 

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