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In order to increase the output current, MOS is usually connected in parallel, so that the gate capacitance is large. The signal driving G should pay attention to... [Copy link]

 

In order to increase the output current, MOS is usually connected in parallel, so that the gate capacitance is large. What details should be paid attention to when driving the G signal?

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I see!   Details Published on 2020-9-9 09:18
 
 

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Let’s not talk about what details to pay attention to in the driving signal.

Your MOS tube is connected "head to head", that is, the drains of the two MOS are connected together, and the purpose may be to use MOS to control AC. With this connection, the drivers of the MOS tubes on both sides must be separated, that is, they must be isolated. With this connection, the drive becomes complicated and cannot be driven by one chip (pin 28 and pin 31 of U12).

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Teacher Mei, look at this.  Details Published on 2020-9-1 15:45
 
 
 

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If the connection method is wrong, how can we talk about "details"? Let's first clarify the "major sections".

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What's the problem with the reference design downloaded from TI's official website?  Details Published on 2020-9-1 15:35
 
 
 

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maychang posted on 2020-8-31 17:27 If the connection method is wrong, how can we talk about "details"? Let's first figure out the "big section".

What's the problem with the reference design downloaded from TI's official website?

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Please paste the complete "reference design" downloaded from TI's official website, or give me a link so I can download it and take a look.  Details Published on 2020-9-1 15:51
 
 
 

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maychang posted on 2020-8-31 17:26 Let’s not talk about the details of the drive signal. Your MOS tube is connected "head to head", that is, the drains of the two MOS are connected together...

Teacher Mei, look at this.

QQ图片20200901154423.png (394.58 KB, downloads: 0)

QQ图片20200901154423.png
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QWE4562009 posted on 2020-9-1 15:35 What's wrong with the reference design downloaded from TI's official website?

Please paste the complete "reference design" downloaded from TI's official website, or give me a link so I can download it and take a look.

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How do you say Mr. Zhang?  Details Published on 2020-9-4 22:11
 
 
 

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A device that overturns Mr. Zhang’s experience

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I looked at the datasheet of this chip, and it has integrated bootstrap circuit and isolation circuit. Nowadays, the integration of chips is getting higher and higher, and various different parts can be integrated together. It really subverts the experience.  Details Published on 2020-9-5 06:57
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maychang posted on 2020-9-1 15:51 Please post the complete "reference design" downloaded from TI's official website, or give me a link, and I will download it and take a look.

How do you say Mr. Zhang?

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The chip used in the first floor picture is not BQ76200. Multiple MOS tube gates are connected in parallel. You said "this way, the gate capacitance will be large", and then a 5.1k resistor is connected in series. I am afraid that the switching speed will be quite slow.  Details Published on 2020-9-5 07:02
 
 
 

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PowerAnts published on 2020-9-3 09:32 A device that subverts Zhang Lao’s experience https://www.ti.com/cn/lit/ds/symlink/bq76200.pdf

I looked at the datasheet of this chip and found that it has integrated bootstrap circuit and isolation circuit.

Nowadays, the integration of chips is getting higher and higher, and various different parts can be integrated together. It really subverts the experience.

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In the picture on the first floor, the chip used is not BQ76200.

Multiple MOS tube gates are connected in parallel. You said "this way, the gate capacitance will be large", and then a 5.1k resistor is connected in series. I'm afraid the switching speed will be quite slow.

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The same principle as TI's BQ40Z50 is also a high-side driver MOS  Details Published on 2020-9-7 17:55
 
 
 

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maychang posted on 2020-9-5 07:02 In the first floor picture, the chip used is not BQ76200. Multiple MOS tube gates are connected in parallel. You said "In this way, the gate capacitance is large...

The same principle as TI's BQ40Z50 is also a high-side driver MOS

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You said "this way, the gate capacitance will be larger", and then connected a 5.1k resistor in series. The capacitance is larger (it will increase by the number of parallel connections), so why connect such a large resistor in series?  Details Published on 2020-9-7 18:06
 
 
 

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QWE4562009 posted on 2020-9-7 17:55 The same principle as TI's BQ40Z50 is also a high-side driver MOS

You said yourself, "In this way, the gate capacitance will be large", and then you added a 5.1k resistor in series.

The capacitance is large (it increases by as many times as the number of capacitors connected in parallel), so why connect such a large resistor in series?

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Assume that a group of 4 series ternary lithium battery packs has a maximum voltage of 16.8, allowing the user device to have a 1000uF capacitor, and the capacitor charging charge is 0.0168C. The following MOSFET should control the charging peak to 0.7 times the safe zone, that is, 120A. Then the MOSFET opening process must not be less than 140uS. Hehe, this is not a big deal. Some users want to connect 10  Details Published on 2020-9-9 09:11
 
 
 

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maychang posted on 2020-9-7 18:06 You said "In this way, the gate capacitance will be large", and then connected in series with a 5.1k resistor. The capacitance is large (the more parallel connections, the larger the capacitance...

Assume that a group of 4 series of ternary lithium battery packs has a maximum voltage of 16.8, and allows a 1000uF capacitor at the user's device end, and the capacitor charging charge is 0.0168C. The following MOSFET must control the charging peak to 0.7 times the safe zone, that is, 120A. Then the MOSFET's opening process must not be less than 140uS. Hehe, this is not a big deal. Some users want to connect a 10000uF capacitor.

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I see!  Details Published on 2020-9-9 09:18
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PowerAnts published on 2020-9-9 09:11 Assume a group of 4 series ternary lithium battery packs with a maximum voltage of 16.8, allowing the user device to have a 1000uF capacitor, and the capacitor charge is 0.0168C. The following MOSFET should...

I see!

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