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Why does the MOS tube burn when LTC4359 is used as a load switch solution? [Copy link]

 
This post was last edited by hysdzgcsj2020 on 2020-2-2 22:29

Teachers: As shown in the schematic diagram, I used LTC4359 to make a load switch solution, which uses a pair of back-to-back MOS tubes. The front MOS acts as a load switch, and the rear MOS tube acts as an ideal diode.

My application requires two DC power supplies, and I use the one with higher voltage. BAT_MAIN is one DC24V+; BAT_SLV is another DC24V+. The MOS tube I use is Infineon: IPT015N10N5ATMA1, and the parameters of this NMOS are: VDSS=100V, IDS=300A, RDON=1.5MOHMS.

The initial test process is: I first test the control of a certain channel, such as testing only the first channel, connecting BAT_MAIN=DC24V+, and then connecting an 8-ohm resistor to the output. There is no control signal from the microcontroller, and the two NMOS Q13 and Q23 (2N7002) are not welded. It is equivalent to the 5th pin of LTC4359 being suspended. According to the chip manual, when suspended, the chip is in the enabled state. After power is turned on, the system has output, and the load current is about 3A. Then I use a metal wire to short the 5th pin of LTC4359 directly to the ground VSS of the chip, in order to put the chip into shutdown mode, and then turn off the two NOMS tubes Q11 and Q12 on the main circuit. Achieve the effect of powering off the load.

At the moment when the chip SHDN was shorted to ground, I saw smoke coming out of the MOS (Q11) tube in front of the main circuit.

After power off, I removed the front MOS. I found that the MOS was in breakdown state. I replaced it with a new MOS and performed the same test. I found that the front MOS was still smoking. I tested it 5 times in a row. The operation was the same every time, and the front MOS was burned every time.

I think the MOS is not caused by voltage stress. The system voltage is 24V, twice is 48V, and the tube is 100V, 300A.

Why is it that every time when the chip SHDN is pulled low, the MOS in front smokes?

I saw several people encountering similar problems on the ADI official forum, and ADI officials did not give a clear answer.

Please give me some advice. Thanks.

LTC4359YL.jpg (227.09 KB, downloads: 1)

LTC4359负载开关方案

LTC4359负载开关方案
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[attach]730228[/attach] One of his test board manuals states that the maximum load current when using shdn startup is basically unusable for high-power loads.   Details Published on 2023-9-5 16:30
 
 

2w

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Is the circuit provided in the official new product manual?

It is recommended to check carefully, especially the G pole connection of the control terminal.

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qwqwqw2088 posted on 2020-2-3 08:58 Is the circuit given in the official new product manual? It is recommended to check it carefully, especially the G pole connection of the control end

It is officially recommended.

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Please have a look at this thread. Similar question.

LTC4359论坛.png (201.82 KB, downloads: 2)

LTC4359WENTI

LTC4359WENTI
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There is no problem with back-to-back MOS. The problem is that the internal resistance of Q12 MOS switch should be large. The RDON=1.5MOHMS used by the original poster is a bit small.   Details Published on 2020-2-6 16:21
 
 
 

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hysdzgcsj2020 posted on 2020-2-5 20:35 Please take a look at this post. Similar question.

There is no problem with back-to-back MOS

The problem is that the internal resistance of the MOS switch of Q12 should be large. The RDON=1.5MOHMS used by the original poster is a bit small.

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It is recommended to read the official manual carefully to understand the role of this mos

The official manual recommends using the MOS tube position at Q12, which has an internal resistance of 8 mOhms.

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Hello. The front MOS (labeled Q11) acts as an electronic switch to control the path from input to output; the rear MOS (labeled Q12) acts as an ideal diode to block the path from output to input. What do you mean by large off resistance?

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Acts as an ideal diode, but is replaced by a MOS

The on-resistance RDS (ON) of MOSFET directly affects the forward voltage drop and power consumption.
It is recommended to read the front and back parts of the manual MOSFET Selection carefully.

Or just use the officially recommended MOS model and strictly follow the component layout recommended in the manual.

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Hello. I looked at the data sheet. This chip solution is prone to problems if it drives a back-to-back NMOS. This chip dynamically adjusts the GS voltage. When the GS voltage of the front NMOS changes, the SOA is prone to problems. This is not suitable for driving electronic switches.

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365396080, Junlong agent
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Hello, senior, has this problem been solved? I am also looking at this solution recently and would like to know more.

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One of his test board manuals states that the maximum load current when using shdn startup is basically unusable for high-power loads.

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