CC1101 433 wireless module, STM8 serial port transparent transmission

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CC1101 433 wireless module, STM8 serial port transparent transmission [Copy link]

I drew a CC1101 transceiver board a while ago, but it was not successful. Finally, I found that the 27nH inductor was soldered into 27uH, which eventually led to failure.

Now after the replacement, it can cover all corners of our company, which is enough.

Below is the STM8 program

CC1101.C

/*************************************************************************************************************
* File name: CC1101.c
* Function: STM8 CC1101 driver function
* Author: cp1300@139.com
* Creation time: 2013-12-06 14:35
* Last modification time: 2013-12-06
* Details: 433MHZ transceiver chip driver
***************************************************************************************************************/
#include "system.h"
#include "delay.h"
#include "CC1101.h"

//CC1101 command mask
#define WRITE_BURST 0x40 //Continuous write
#define READ_SINGLE 0x80 //Read
#define WRITE_SINGLE 0x00 //Write
#define READ_BURST 0xC0



//Continuous read
#define BURST_READ_FIFO 0xff //Burst read RX FIFO
#define BYTE_READ_FIFO 0xBF //Single byte read RX FIFO
#define BURST_WRITE_FIFO 0x7f //Burst write TX FIFO #define
BYTE_WRITE_FIFO 0x3f //Single byte write TX FIFO

#define CC1101_DATA_LEN 64



//SPI interface
//Low level interface macro definition
#define CC1101_CS_H() (GPIOA->ODR|=BIT3) //PA3=1
#define CC1101_CS_L() (GPIOA->ODR&=~BIT3) //PA3=0
#define CC1101_MOSI_H() (GPIOC->ODR|=BIT6) //PC6
#define CC1101_MOSI_L() (GPIOC->ODR&=~BIT6) //PC6
#define CC1101_SCLK_H() (GPIOC->ODR|=BIT5) //PC5
#define CC1101_SCLK_L() (GPIOC->ODR&=~BIT5) //PC5
#define CC1101_GetMISO() (GPIOC->IDR&BIT7) //PC7


//CC1101 SPI read and write one byte
//without chip select
u8 CC1101_ReadWriteByte(u8 data)
{
u8 i;
u8 temp = 0;

for(i = 0;i < 8;i ++)
{
if(data & 0x80)
{
CC1101_MOSI_H();
}
else
{
CC1101_MOSI_L();
}
data <<= 1;nop;
CC1101_SCLK_H(); //Write data on the rising edge of the clock
temp <<= 1;nop;
if(CC1101_GetMISO()) temp ++;
CC1101_SCLK_L(); //Read data on the falling edge of the clock
}

return temp;
}


/************************************************************************************************************************
* Function: u8 CC1101_Command(CC1101_CMD_TYPE Cmd)
* Function: Send single-byte command
* Parameter: Cmd; command, see CC1101_CMD_TYPE
* Return: register value
* Dependency: underlying macro definition
* Author: cp1300@139.com
* Time: 2013-12-06
* Last modified: 2013-12-06
* Description: Direct access in write mode will trigger the response command
****************************************************************************************************************/
u8 CC1101_Command(CC1101_CMD_TYPE Cmd)
{
u8 status;

CC1101_CS_L(); //Chip select validwhile
(CC1101_GetMISO());
status = CC1101_ReadWriteByte((u8)Cmd); //Send commandwhile
(CC1101_GetMISO());
CC1101_CS_H(); //Chip select closedreturn
status;
}



/************************************************************************************************************************
* Function: u8 CC1101_ReadReg(CC1101_REG_TYPE RegAddr)
* Function: Read CC1101 general register
* Parameter: RegAddr: register address, see: CC1101_REG_TYPE
* Return: register value
* Dependency: underlying macro definition
* Author: cp1300@139.com
* Time: 2013-12-06
* Last modified: 2013-12-06
* Description: Read one register at a time
************************************************************************************************************/
u8 CC1101_ReadReg(CC1101_REG_TYPE RegAddr)
{
u8 data;

CC1101_CS_L(); //Chip select valid
CC1101_ReadWriteByte((u8)READ_SINGLE|RegAddr); //Send read command and register index
data = CC1101_ReadWriteByte(0xff); //Read
CC1101_CS_H(); //Chip select closed
return data;
}


/****************************************************************************************************************************
* Function: u8 CC1101_WriteReg(CC1101_REG_TYPE RegAddr, u8 data)
* Function: Write CC1101 general register
* Parameter: RegAddr: register address, see: CC1101_REG_TYPE, data: data to be written
* Return: value of status register
* Dependency: underlying macro definition
* Author: cp1300@139.com
* Time: 2013-12-06
* Last modified: 2013-12-06
* Description: Write one register at a time and return the status.
Do not write to the read-only register.
******************************************************************************************************************/
u8 CC1101_WriteReg(CC1101_REG_TYPE RegAddr, u8 data)
{
u8 status;

if(RegAddr > 0x80) return 0; //Prevent misoperation, registers after 0x30 are read-only status registers
CC1101_CS_L(); //Chip select valid
while(CC1101_GetMISO());
status = CC1101_ReadWriteByte((u8)WRITE_SINGLE|RegAddr); //Send write command and register index
CC1101_ReadWriteByte(data); //Write data
CC1101_CS_H(); //Chip select off
return status;
}


#include "LED.h"
void CC1101_Init(u8 Addr)
{

//Initialize chip select
GPIOx_Init(GPIOA, BIT3, OUT_PP_10M);
CC1101_CS_H();
//Initialize SCLK
GPIOx_Init(GPIOC, BIT5, OUT_PP_10M);
CC1101_SCLK_H();
//Initialize MOSI
GPIOx_Init(GPIOC, BIT6, OUT_PP_10M);
CC1101_MOSI_H();
//Initialize MISO
GPIOx_Init(GPIOC, BIT7, IN_UP);

CC1101_SCLK_L();
CC1101_MOSI_L();
//Initialize GDO0, GDO2 corresponding to PC3, PC4
GPIOx_Init(GPIOC, BIT3, IN_UP);
GPIOx_Init(GPIOC, BIT4, IN_UP);

//Initialize register
CC1101_Command(CC1101_CMD_SRES); //Reset
Delay_MS(10);

while(CC1101_ReadReg(CC1101_REG_AGCTEST) != 0x3F) //Detect communication
{
LED_ON();
Delay_MS(10);
LED_OFF();
Delay_MS(100);
}
LED_OFF();

CC1101_WriteReg(CC1101_REG_IOCFG0,0x06); //Send reminder pin
CC1101_WriteReg(CC1101_REG_IOCFG2,0x01); //Receive reminder pin

CC1101_WriteReg(CC1101_REG_FIFOTHR,0x0f); //RX FIFO and TX FIFO threshold
CC1101_WriteReg(CC1101_REG_SYNC1,0xD3); //Sync word, high byte
CC1101_WriteReg(CC1101_REG_SYNC0,0x91); //Sync word, low byte
CC1101_WriteReg(CC1101_REG_PKTLEN,CC1101_DATA_LEN); //Data packet length, 255
CC1101_WriteReg(CC1101_REG_PKTCTRL1,0x04); //Data packet automatic control
CC1101_WriteReg(CC1101_REG_PKTCTRL0,0x04); //Data packet automatic control
CC1101_WriteReg(CC1101_REG_ADDR,0x00); //Device address
CC1101_WriteReg(CC1101_REG_CHANNR,0x00); //Channel
CC1101_WriteReg(CC1101_REG_FSCTRL1,0x06); //Frequency synthesizer control, high byte
CC1101_WriteReg(CC1101_REG_FSCTRL0,0x00); //Frequency synthesizer control, low byte
CC1101_WriteReg(CC1101_REG_FREQ2,0x10); //Frequency control vocabulary, high byte
CC1101_WriteReg(CC1101_REG_FREQ1,0xb1); //Frequency control vocabulary, middle byte
CC1101_WriteReg(CC1101_REG_FREQ0,0x3b); //Frequency control vocabulary, low byte

//2.4KBPS
CC1101_WriteReg(CC1101_REG_MDMCFG4,0xF6); //Modulator configuration
CC1101_WriteReg(CC1101_REG_MDMCFG3,0x83); //Modulator configuration

CC1101_WriteReg(CC1101_REG_MDMCFG2,0x13); //Modulator configuration
CC1101_WriteReg(CC1101_REG_MDMCFG1,0x22); //Modulator configuration
CC1101_WriteReg(CC1101_REG_MDMCFG0,0xf8); //Modulator configuration

CC1101_WriteReg(CC1101_REG_DEVIATN,0x15); //Modulator deviation setting CC1101_WriteReg(CC1101_REG_MCSM2,0x07
); //Main communication control state machine configuration
CC1101_WriteReg(CC1101_REG_MCSM1,0x30); //Main communication control state machine configuration
CC1101_WriteReg(CC1101_REG_MCSM0,0x18); //Main communication control state machine configuration CC1101_WriteReg
(CC1101_REG_FOCCFG,0x16); //Frequency offset compensation configuration
CC1101_WriteReg(CC1101_REG_BSCFG,0x6c); //Bit sync configuration
CC1101_WriteReg(CC1101_REG_AGCTRL2,0x03); //AGC control
CC1101_WriteReg(CC1101_REG_AGCTRL1,0x40); //AGC control CC1101_WriteReg
(CC1101_REG_AGCTRL0,0x91); //AGC control
CC1101_WriteReg(CC1101_REG_WOREVT1,0x87); //High byte time 0 pause
CC1101_WriteReg(CC1101_REG_WOREVT0,0x6b); //Low byte time 0 pause
CC1101_WriteReg(CC1101_REG_WORCTRL,0xfb); //Electromagnetic wave activation control
CC1101_WriteReg(CC1101_REG_FREND1,0x56); //Front-end RX configuration
CC1101_WriteReg(CC1101_REG_FREND0,0x10); //Front-end TX configuration
CC1101_WriteReg(CC1101_REG_FSCAL3,0xe9); //Frequency synthesizer calibration
CC1101_WriteReg(CC1101_REG_FSCAL2,0x2a); //Frequency synthesizer
calibration CC1101_WriteReg(CC1101_REG_FSCAL1,0x00); //Frequency synthesizer calibration
CC1101_WriteReg(CC1101_REG_FSCAL0,0x1f); //Frequency synthesizer calibration
CC1101_WriteReg(CC1101_REG_RCCTRL1,0x41); //RC oscillator configuration
CC1101_WriteReg(CC1101_REG_RCCTRL0,0x00); //RC oscillator configuration
CC1101_WriteReg(CC1101_REG_FSTEST,0x59); //Frequency synthesizer calibration control

//10DB
//CC1101_WriteReg(CC1101_REG_PATABLE0,0xc0);
//CC1101_WriteReg(CC1101_REG_PATABLE1,0xc0);
/*CC1101_WriteReg(CC1101_REG_PATABLE2,0xc0);
CC1101_WriteReg(CC1101_REG_PATABLE3,0xc0);
CC1101_WriteReg(CC1101_REG_PATABLE4,0xc0);
CC1101_WriteReg(CC1101_REG_PATABLE5,0xc0);
CC1101_WriteReg(CC1101_REG_PATABLE6,0xc0);
CC1101_WriteReg(CC1101_REG_PATABLE7,0xc0); */
Delay_MS(10);
}



/********************************************************************************************************************
* Function: void CC1101_WriteTxFIFO(u8 *pBuff,u8 len)
* Function: Write data to the transmit buffer
* Parameter: pBuff: pointer to the data buffer to be written, len: length of the data to be written
* Return: None
* Dependency: underlying macro definition
* Author: cp1300@139.com
* Time: 2014-01-01
* Last modified: 2014-01-01
* Description: Write data to the transmit FIFO
**********************************************************************************************************************/
void CC1101_WriteTxFIFO(u8 *pBuff,u8 len)
{
u16 i;

CC1101_CS_L();
CC1101_ReadWriteByte(BURST_WRITE_FIFO);
for(i = 0;i < len;i ++)
{
CC1101_ReadWriteByte(pBuff);
}
CC1101_CS_H();
}



/*****************************************************************************************************************************
* Function: void CC1101_ReadRxFIFO(u8 *pBuff,u8 len)
* Function: Read the receive buffer
* Parameter: pBuff: pointer to the data buffer to be read, len: length of the data to be read
* Return: None
* Dependency: underlying macro definition
* Author: cp1300@139.com
* Time: 2014-01-01
* Last modified: 2014-01-01
* Description: Read data from receive FIFO
********************************************************************************************************/
void CC1101_ReadRxFIFO(u8 *pBuff,u8 len)
{
u16 i;

CC1101_CS_L();
CC1101_ReadWriteByte(BURST_READ_FIFO);
for(i = 0;i < len;i ++)
{
pBuff = CC1101_ReadWriteByte(0xff);
}
CC1101_CS_H();
}


//Send data, send all buffer data out
//A maximum of 64B at a time, due to FIFO limit
void CC1101_RfDataSend(u8 *pBuff,u8 len)
{
CC1101_Command(CC1101_CMD_SIDLE); //Exit current mode
CC1101_Command(CC1101_CMD_SFTX); //Clear transmit buffer
CC1101_WriteTxFIFO(pBuff, len); //Write data to transmit buffer
CC1101_Command(CC1101_CMD_STX); //Start sending data

while(!CC1101_GDO0);
while(CC1101_GDO0);

CC1101_Command(CC1101_CMD_SIDLE); //Exit current mode
}





//Send data packet
//Each transmission is up to 65B, the first byte is the length, more data will be sent repeatedly
//Can send any size
//CC1101PackSize valid data packet size, 0-64, that is, CC1101 single transmission data size -1
void CC1101_RfDataSendPack(u8 *pBuff, u16 len)
{
u16 i,m,n,j;

m = len / (CC1101_DATA_LEN-1); //Number of integer data frames
n = len % (CC1101_DATA_LEN-1); //Remainder

//Send integer packet
for(i = 0;i < m;i ++)
{
Delay_MS(1);
CC1101_Command(CC1101_CMD_SIDLE); //Exit current mode
CC1101_Command(CC1101_CMD_SFTX); //Clear send buffer

CC1101_CS_L();
CC1101_ReadWriteByte(BURST_WRITE_FIFO);

CC1101_ReadWriteByte(CC1101_DATA_LEN-1);//Write packet size first
for(j = 0;j < (CC1101_DATA_LEN-1);j ++)
{
CC1101_ReadWriteByte(*pBuff++); //Write data to the send buffer
}
CC1101_CS_H();

CC1101_Command(CC1101_CMD_STX); //Start sending datawhile
(!CC1101_GDO0);
while(CC1101_GDO0); //Wait for sending to complete
}
//Send remainder packetif
(n!=0)
{
Delay_MS(1);
CC1101_Command(CC1101_CMD_SIDLE); //Exit current modeCC1101_Command
(CC1101_CMD_SFTX); //Clear send bufferCC1101_CS_L
();
CC1101_ReadWriteByte(BURST_WRITE_FIFO);

CC1101_ReadWriteByte(n); //Write packet size firstfor
(j = 0;j < n;j ++)
{
CC1101_ReadWriteByte(*pBuff++); //Write data to send buffer
}
CC1101_CS_H();

CC1101_Command(CC1101_CMD_STX); //Start sending data
while(!CC1101_GDO0);
while(CC1101_GDO0); //Wait for sending to complete
}
CC1101_Command(CC1101_CMD_SIDLE); //Exit current mode
}







//Read chip status
u8 CC1101_GetStatus(void)
{
return CC1101_WriteReg(CC1101_REG_TEST2, 0x98);
}

CC1101.H

/************************************************************************************************************
* File name: CC1101.c
* Function: STM8 CC1101 driver function
* Author: cp1300@139.com
* Creation time: 2013-12-06 14:35
* Last modification time: 2013-12-06
* Details: 433MHZ transceiver chip driver
***************************************************************************************************************/
#ifndef _CC1101_H_
#define _CC1101_H_
#include "system.h"


//CC1101 command
//Single direct access in write mode will trigger the response command
typedef enum
{
CC1101_CMD_SRES = 0x30, //Restart
CC1101_CMD_SFSTXON = 0x31, //Turn on and calibrate frequency synthesizer (if MCSM0.FSAUTOCAL=1)
CC1101_CMD_SXOFF = 0x32, //Turn off crystal oscillator
CC1101_CMD_SCAL = 0x33, //Calibrate frequency synthesizer and shut down (turn on fast start). SCAL can be filtered from idle mode without setting manual calibration mode (MCSM0.FS_AUTOCAL=0).
CC1101_CMD_SRX = 0x34, //Enable RX. Run calibration first if previous state was idle and MCSM0.FS_AUTOCAL=1.
CC1101_CMD_STX = 0x35, //Idle state: Enable TX. Run calibration first if MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled: Enter TX if channel is empty
CC1101_CMD_SIDLE = 0x36, //Leave RX/TX, shut down frequency synthesizer and leave electromagnetic wave activation mode if available
CC1101_CMD_SAFC = 0x37, //Run AFC adjustment of the frequency synthesizer listed in Section 22.1
CC1101_CMD_SWOR = 0x38, //Run the automatic RX election sequence described in Section 27.5 (electromagnetic wave activation)
CC1101_CMD_SPWD = 0x39, //Enter power reduction mode when CSn is high.
CC1101_CMD_SFRX = 0x3a, //Flush RX FIFO buffer
CC1101_CMD_SFTX = 0x3b, //Flush TX FIFO buffer
CC1101_CMD_SWORRST = 0x3c, //Reset real time clock
CC1101_CMD_SNOP = 0x3d, //No operation. Might be used to make the filter command 2 bytes for simpler software.
}CC1101_CMD_TYPE;



//CC1101 register definition
typedef enum
{
//Readable and writable register
CC1101_REG_IOCFG2 = 0x00, //GDO2 output pin configuration
CC1101_REG_IOCFG1 = 0x01, //GDO1 output pin configuration
CC1101_REG_IOCFG0 = 0x02, //GDO0 output pin configuration
CC1101_REG_FIFOTHR = 0x03, //RX FIFO and TX FIFO thresholds
CC1101_REG_SYNC1 = 0x04, //Sync word, high byte
CC1101_REG_SYNC0 = 0x05, //Sync word, low byte
CC1101_REG_PKTLEN = 0x06, //Data packet length
CC1101_REG_PKTCTRL1 = 0x07, //Packet automatic control
CC1101_REG_PKTCTRL0 = 0x08, //Packet automatic control
CC1101_REG_ADDR = 0x09, //Device address
CC1101_REG_CHANNR = 0x0a, //Number of channels
CC1101_REG_FSCTRL1 = 0x0b, //Frequency synthesizer control, high byte
CC1101_REG_FSCTRL0 = 0x0c, //Frequency synthesizer control, low byte
CC1101_REG_FREQ2 = 0x0d, //Frequency control vocabulary, high byte
CC1101_REG_FREQ1 = 0x0e, //Frequency control vocabulary, middle byte
CC1101_REG_FREQ0 = 0x0f, //Frequency control vocabulary, low byte
CC1101_REG_MDMCFG4 = 0x10, //Modulator configuration
CC1101_REG_MDMCFG3 = 0x11, //Modulator configuration CC1101_REG_MDMCFG2
= 0x12, //Modulator configuration
CC1101_REG_MDMCFG1 = 0x13, //Modulator configuration
CC1101_REG_MDMCFG0 = 0x14, //Modulator configuration
CC1101_REG_DEVIATN = 0x15, //Modulator deviation setting
CC1101_REG_MCSM2 = 0x16, //Master communication control state machine configuration
CC1101_REG_MCSM1 = 0x17, //Master communication control state machine configuration
CC1101_REG_MCSM0 = 0x18, // Main communication control state machine configuration
CC1101_REG_FOCCFG = 0x19, // Frequency offset compensation configuration
CC1101_REG_BSCFG = 0x1a, // Bit synchronization configuration
CC1101_REG_AGCTRL2 = 0x1b, // AGC control
CC1101_REG_AGCTRL1 = 0x1c, // AGC control
CC1101_REG_AGCTRL0 = 0x1d, // AGC control
CC1101_REG_WOREVT1 = 0x1e, // High byte time 0 pause
CC1101_REG_WOREVT0 = 0x1f, // Low byte time 0 pause
CC1101_REG_WORCTRL = 0x20, // Electromagnetic wave activation control
CC1101_REG_FREND1 = 0x21, // Front end RX configuration
CC1101_REG_FREND0 = 0x22, //Front-end TX configuration
CC1101_REG_FSCAL3 = 0x23, //Frequency synthesizer calibration
CC1101_REG_FSCAL2 = 0x24, //Frequency synthesizer calibration
CC1101_REG_FSCAL1 = 0x25, //Frequency synthesizer calibration
CC1101_REG_FSCAL0 = 0x26, //Frequency synthesizer calibration
CC1101_REG_RCCTRL1 = 0x27, //RC oscillator configuration
CC1101_REG_RCCTRL0 = 0x28, //RC oscillator configuration
CC1101_REG_FSTEST = 0x29, //Frequency synthesizer calibration control
CC1101_REG_PTEST = 0x2a, //Product test
CC1101_REG_AGCTEST = 0x2b, //AGC test
CC1101_REG_TEST2 = 0x2c, //Different test settings
CC1101_REG_TEST1 = 0x2d, //Different test settings
CC1101_REG_TEST0 = 0x2e, //Different test settings
//Read-only status register, if written will cause command filtering
CC1101_REG_PARTNUM = 0xf0, //Part number of CC2550
CC1101_REG_VERSION = 0xf1, //Current version number
CC1101_REG_FREQEST = 0xf2, //Frequency offset estimate
CC1101_REG_LQI = 0xf3, //Demodulator estimate of connection quality
CC1101_REG_RSSI = 0xf4, //Received signal strength indication
CC1101_REG_MARCSTATE = 0xf5, //Control state machine state
CC1101_REG_WORTIME1 = 0xf6, //WOR timer high byte
CC1101_REG_WORTIME0 = 0xf7, //WOR timer low byte
CC1101_REG_PKTSTATUS = 0xf8, //Current GDOx status and packet status
CC1101_REG_VCOVCDAC = 0xf9, //Current settings of PLL calibration module
CC1101_REG_TXBYTES = 0xfA, //Underflow and number of bits in TX FIFO
CC1101_REG_RXBYTES = 0xfB, //Underflow and number of bits in RX FIFO
//
CC1101_REG_STATUS1 = 0xfc, //
CC1101_REG_STATUS0 = 0xfd, //
//Power control
CC1101_REG_PATABLE0 = 0x40,
CC1101_REG_PATABLE1 = 0x41,
CC1101_REG_PATABLE2 = 0x42,
CC1101_REG_PATABLE3 = 0x43,
CC1101_REG_PATABLE4 = 0x44,
CC1101_REG_PATABLE5 = 0x45,
CC1101_REG_PATABLE6 = 0x46,
CC1101_REG_PATABLE7 = 0x47,
}CC1101_REG_TYPE;

//IO
#define CC1101_GDO0 (GPIOC->IDR&BIT3) //PC3
#define CC1101_GDO2 (GPIOC->IDR&BIT4) //PC4

void CC1101_Init(u8 Addr); //Initialize CC1101
u8 CC1101_ReadReg(CC1101_REG_TYPE RegAddr); //Read CC1101 general register
u8 CC1101_WriteReg(CC1101_REG_TYPE RegAddr, u8 data); //Write CC1101 general register
u8 CC1101_Command(CC1101_CMD_TYPE Cmd); //Send single byte command

u8 CC1101_GetStatus(void); //Read chip status

void CC1101_RfDataSend(u8 *pBuff,u8 len);
void CC1101_ReadRxFIFO(u8 *pBuff,u8 len);

//CC1101PackSize effective data packet size, 0-64, that is, CC1101 single send data size -1
void CC1101_RfDataSendPack(u8 *pBuff, u16 len);

#endif //CC1101

MAIN.C transparent transmission

#include "system.h"
#include "uart1.h"
#include "delay.h"
#include "main.h"
#include "LED.h"
#include "cc1101.h"

//Serial port buffer
#define UART_BUFF_SIZE 256 //Serial port receive buffer size
u8 UartBuff[2][UART_BUFF_SIZE]; //Serial port receive buffer
u16 UartLen1 = 0; //Serial port receive data length
u16 UartLen2 = 0; //Serial port receive data length


//CC1101 buffer
#define RF_BUFF_SIZE 64 //CC1101 buffer size
u8 RfBuff[RF_BUFF_SIZE]; //CC1101 buffer
u8 RfLen = 0; //CC1101 receive buffer size


//Buffer selection
u8 UART_RxNum = 0; //Serial port buffer selection


//Main function
void main(void)
{
u8 LastNum = 0;
u32 delay = 0;

SYS_ClockInit(); //Initialize system clock to internal crystal, 16MHZ
//Initialize LED
LED_Init();
//Initialize serial port
UART1_Init(115200, ENABLE); //Initialize UART1, enable receive interrupt
UART1_SetRxBuff(UartBuff[UART_RxNum],UART_BUFF_SIZE); //Set serial port 1 receive buffer
CC1101_Init(0Xaa);
//CC1101_WriteReg(CC1101_REG_PATABLE1,0xc0);


CC1101_WriteReg(CC1101_REG_PATABLE0,0x00);
CC1101_Command(CC1101_CMD_SIDLE); //Exit current mode
CC1101_Command(CC1101_CMD_SRX); //Enter receiving mode


SYS_EnableInterrupt(); //Enable system interrupt
while(1)
{


if(++delay == 120000)
{
delay = 0;
UartLen1 = UART1_GetRxCnt(); //Get the number of received data
if(UartLen1>0)
{
SYS_DisableInterrupt(); //Disable interrupt
LED_ON();
LastNum = UART_RxNum; //Record the last buffer number
UART_RxNum = (~UART_RxNum)&0x01;
UART1_SetRxBuff(UartBuff[UART_RxNum],UART_BUFF_SIZE); //Switch serial port receiving buffer
//UART1_ClearRxCnt(); //Clear receive counter
SYS_EnableInterrupt(); //Turn on system interrupt

CC1101_WriteReg(CC1101_REG_PATABLE0,0xc0); //Turn on antenna gain

CC1101_RfDataSendPack(UartBuff[LastNum], UartLen1); //CC1101 sends data packet

CC1101_WriteReg(CC1101_REG_PATABLE0,0); //Turn off antenna gain
CC1101_Command(CC1101_CMD_SIDLE); //Exit current mode
CC1101_Command(CC1101_CMD_SRX); //Enter receiving mode
LED_OFF();
}
}

//CC1101 receives data
if(CC1101_GDO2)
{
LED_ON();
RfLen = CC1101_ReadReg(CC1101_REG_RXBYTES);
CC1101_ReadRxFIFO(RfBuff,RfLen);
UART1_SendData(&RfBuff[1], RfBuff[0]);//0B is the data length, the following is the valid data
CC1101_Command(CC1101_CMD_SIDLE); //Exit current mode
CC1101_Command(CC1101_CMD_SFRX); //Clear receive buffer
CC1101_Command(CC1101_CMD_SRX); //Enter receive mode
LED_OFF();
}

}
}

To achieve transparent transmission, the problem found during debugging is that the transmission gain must be turned off when receiving, otherwise it cannot be received. It should be that the internal transmitting and receiving antennas are switched.

Physical picture