DP83822I Industrial Ethernet PHY auto-negotiation function and its strap resistor configuration

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DP83822I Industrial Ethernet PHY auto-negotiation function and its strap resistor configuration [Copy link]

In factory automation applications, due to the increasing number of on-site device nodes and the increasing requirements for automation equipment processing accuracy and real-time performance, traditional serial industrial buses can no longer meet the requirements of production line synchronization and large-scale data transmission. Ethernet has gradually become the mainstream, and the global mainstream OEMs have developed deterministic network industrial Ethernet protocols based on Ethernet, including Profinet, Ethercat, Powerlink, etc. These protocols all require Ethernet as the transmission medium, and Ethernet PHY is mainly responsible. At present, the industrial Ethernet bus rate is mainly 10/100M. The next generation of industrial bus technology will be based on TSN (time-sensitive network) and Ethernet protocols with a rate of 1000M and above.

During Ethernet port function debugging, the most common problem is that the physical layer link cannot be correctly established between the two ports. Therefore, the content of this document is based on TI Ethernet PHY product DP83822, introducing the Ethernet port auto-negotiation function phenomenon, the correct test waveform and strap resistance setting.

1. Introduction

The OSI model defines a 7-layer network model. The Ethernet MAC layer corresponds to the second layer in the OSI model - the data link layer, and the Ethernet PHY corresponds to the first layer in the OSI model - the physical layer. For Ethernet, the main function of the physical layer is to convert the original data (voltage, current, etc.) transmitted in the network cable or optical fiber into a digital signal that can be received and complies with the protocol, which provides a physical connection for the data link layer. The physical layer mainly specifies the signal voltage, frequency, pin function, impedance, etc. As the basis of network communication, communication data can only be transmitted between ports after the physical layer successfully establishes a link. Ethernet PHY undertakes all the work of the physical layer link. Only when the PHY works under the correct configuration can the communication link work normally. The following will take 10M/100M Ethernet PHY as an example to explain the physical layer link establishment method - automatic negotiation and how to detect whether the DP83822 has correctly enabled this function by detecting the TRX_P/N pin waveform.

2. DP83822 Auto-Negotiation Function

According to IEEE802.3, the auto-negotiation mode function is that the Ethernet port automatically adjusts the speed and working mode of the port to the highest level that the two ports can support according to the device link speed and duplex mode of the other port. The main contents of the auto-negotiation protocol include: duplex mode, operating rate, etc. The auto-negotiation function is completely implemented by the physical layer PHY chip, without the need for additional data packets and high-level protocol overhead. Depending on the broadcast communication rate of 10M or 100M, the auto-negotiation function provides two modes: NLP (Figure 6) and FLP (Figure 2).

DP83822I (industrial version) supports 10M – 10Base-TE mode and 100M – 100Bast – TX mode

10Base-TE auto-negotiation mode (10M)

When using a single 10Base-TE broadcast auto-negotiation mode, the PHY chip will send NLP (Normal Link Pulse) normal link pulses through TXD_P, TXD_N and RXD_P, RXD_N in Figure 1, with each pulse interval of 16ms. In order to be compatible with both T568A straight-through cables and T568B crossover cables, NLP is broadcasted at the same time on the transceiver side, and the automatic crossover switch function (Auto-MDIX) is determined based on the monitoring status of the other port.

100Base-TX auto-negotiation mode (100M)

When using the 100Bast-TX auto-negotiation mode, the PHY chip will send FLP (Fast Link Pulse) fast link pulses through TXD_P, TXD_N and RXD_P, RXD_N in Figure 1. Since the 100Base-TX auto-negotiation mode is compatible from 100Base-T to 10Base-T, if the other port can only support 10M Ethernet, both sides will be judged as 10Base-T. In order to be compatible with both T568A straight-through cables and T568B crossover cables, FLP is broadcasted at the same time on the transceiver, and the automatic crossover switch function (Auto-MDIX) is determined based on the monitoring status of the other port.

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Figure 1 DP83822 schematic

Turn on auto-negotiation mode: TXD_P/N pin waveform

The test uses the DP83822I evaluation module [1] with default resistor and register configurations, and without a network cable connected to other Ethernet ports. By observing the TXD_P pin waveform, it can be determined whether the chip is performing auto-negotiation.

When no other port is connected to this port, the FLP waveform sent by the TXD_P/N pin in automatic mode is shown in Figure 2. TXD_P/N will continue to send FLP signals to the remote Ethernet port, and TXD_P/N will also monitor whether the other end transmits FLP signals through the network cable. The interval between each frame of FLP pulse transmission is 16ms. The DC common mode voltage is 3.3V, and the single-ended peak voltage is 5.2V.

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Figure 2 100base-TX auto-negotiation FLP signal

If you zoom in on a single frame pulse period, you can see that the FLP signal contains multiple pulse signals. The maximum number is 33 pulses, the first and last pulses are clock pulses, and the data pulses are between every two clock pulses. When a data pulse appears, the bit is '1', and when the data pulse is 0, the bit is '0'. Information such as duplex mode and rate is contained in the 16 data pulses, as shown in Figure 3.

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Figure 3 100base-TX auto-negotiation single frame FLP signal

As shown in Figure 4, the single pulses TXD_P and TXD_N have the same amplitude and are differential signals with a phase difference of 180 degrees.

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Figure 4 100base-TX auto-negotiation TXD_P/N differential signal (red TXDP-TXDN) peak value is 3.3V

Turn off auto-negotiation mode: TXD_P/N pin waveform

Using the DP83822I evaluation board, after power-on, use the tool [2] to change 0x0000 (BMCR) BIT12 to '0' to turn off the auto-negotiation mode. At this time, Figure 5 is obtained. It can be seen from the figure that TXD_P no longer sends FLP pulse groups, but continues to send MLT-3 signals. Sending MLT-3 means that the PHY believes that it has entered the forced 100Base-TX state. Figure 5 shows that the Ethernet PHY is working in the idle state of 100Bast-TX.

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Figure 5 100Base-TX Ethernet characteristic signal (MTL-3 level) - Auto-negotiation function is disabled

At this time, 0x0000 (BMCR) BIT13 is set to '0', which means that the Ethernet speed changes from 100M to 10M. At this time, TXD_P/N continues to send NLP signals, because the 10Base-TE idle mode is the same as the NLP signal. At this time, PHY enters the forced 10Base-TE mode.

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Figure 6 10Base-TE NLP - Auto-Negotiation OFF

From the above test results, it can be found that by observing the TXD_P/N pin signal with an oscilloscope, the mode and state of the link circuit of the Ethernet PHY (such as DP83822I ) after power-on can be classified. In the current design of general Ethernet PHY, it is usually recommended to enable the auto-negotiation mode to support the highest rate and full-duplex mode (Auto-Negotiation). When there is no remote Ethernet port link, the waveforms of Figure 2 and Figure 3 should be observed on the TXD_P/N pin.

Auto-negotiation mode Strap resistor configuration

After DP83822I is powered on, the auto-negotiation mode needs to be enabled by default, and the fastest rate and full-duplex mode need to be guaranteed. The most important point is to ensure that the basic mode is selected correctly, that is, AN_EN=1, AN_1=1, AN_0=1.

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Figure 7 Auto-Negotiation Mode Configurable

The resistor configuration of the relevant pins is shown in Figure 8. According to [3], the recommended resistor configuration for RX_D0, RX_D3 and LED_0 is as follows:

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Figure 8 Auto-negotiation mode related strap resistor configuration

RX_D0 pin resistor configuration:

MODE1 (pull-up resistor: OPEN; pull-down resistor: OPEN) and MODE4 (pull-up resistor: 2.49k Ohm; pull-down resistor: OPEN).

RX_D3 pin resistor configuration:

MODE1 (pull-up resistor: OPEN; pull-down resistor: OPEN) and MODE4 (pull-up resistor: 2.49k Ohm; pull-down resistor: OPEN).

LED_0 pin resistor configuration:

MODE3 (pull-up resistor: 6.2k Ohm; pull-down resistor: 1.96k Ohm) and MODE4 (pull-up resistor: OPEN; pull-down resistor: OPEN).

3. Reference Documents

[1] DP83822 EVM: http://www.ti.com/lit/ug/snlu179/snlu179.pdf

[2] USB to MDIO Serial Management Tool: http://www.ti.com/tool/USB-2-MDIO

[3] 4-Level Strap Device Configuration: http://www.ti.com/lit/an/snla258/snla258.pdf

[4] https://www.iol.unh.edu/sites/default/files/knowledgebase/ethernet/Copper_ANEG_JEFF_LAPAK.pdf