1. USB bus
USB1.1:
-------Low speed mode: 1.5Mbps
-------Full speed mode: 12Mbps
USB2.0: backward compatible. Added high-speed mode, with a maximum rate of 480Mbps.
-------High speed mode: 25~480Mbps
USB3.0: backward compatible.
-------super speed: Theoretically, it can reach up to 4.8Gbps. In practice, it is about 10 times that of high speed.
2. UART
RS232: The transmission rate generally does not exceed 20Kbps, the rate is low, and the anti-interference ability is poor. The maximum transmission distance of RS-232C does not exceed 15m (50 feet).
RS422: defines a balanced communication interface that increases the transmission rate to 10Mbps, extends the transmission distance to 4000 feet (when the rate is less than 100Kbps), and allows up to 10 receivers to be connected on a balanced bus. RS-422 is a unidirectional, balanced transmission specification for single-machine transmission and multi-machine reception, named TIA/EIA-422-A standard.
RS485: Added multi-point and bidirectional communication capabilities, that is, allowing multiple transmitters to be connected to the same bus, while increasing the transmitter's drive capability and conflict protection characteristics, and expanding the bus common mode range, and was later named the TIA/EIA-485-A standard. The maximum transmission rate is 10Mbps, with strong anti-interference ability, and can transmit a distance of 1.5km.
The length of the balanced twisted pair is inversely proportional to the transmission rate. The longest cable length can only be used at a rate below 100Kbps. The highest transmission rate can only be achieved at a very short distance. Generally, the maximum transmission rate of a 100-meter twisted pair is only 1Mbps.
3. SPI bus
Full-duplex communication, the transmission rate can reach several Mbps, which is faster than I2C.
4. I2C bus: Half-duplex, only 2 wires. Data line and clock line.
--------Standard speed: 100kbps
--------Fast mode: 400kbps
High speed mode: 3.4Mbps
4. Ethernet, which is the usual network speed.
--------The early Ethernet transmission rate was only 10Mbps.
--------100M network: Theoretically, the maximum speed is 100Mbps.
--------Gigabit Ethernet: Theoretically maximum 1Gbps.
5. SD bus: up to 10Mbps.
6. SATA interface:
--------SATA1.0: The theoretical transfer speed is 150MB/s (or 1.5Gb/s), but the actual transfer speed is only 30MBps.
--------SATA2.0: 300MBps, or 3Gbps. The actual speed is only 80MBps.
--------SATA3.0: 600MBps, or 6Gbps.
--------eSATA: Theoretical transmission speed can reach 1.5Gbps or 3Gbps.
7. PCI bus
--------PCI: 32 bits, 33MHz clock frequency, the rate is 33*4 = 133MBps, or 1Gbps.
-------- PCI 2.1: 64 bits, 66MHz clock frequency: the rate is 66*8 = 528MBps, or 4Gbps.
8. PCI-e:
The PCI Express bus frequency is 2500 MHz, which is achieved at a base frequency of 100 MHz through a Phase Lock Loop (PLL) oscillator.
Serial bus bandwidth (MB/s) = serial bus clock frequency (MHz) * serial bus bit width (bit/8 = B) * serial bus pipeline * encoding method * several groups of data transmitted per clock (cycle)
------PCI Express x1 bus width is 1 bit, bus frequency is 2500 MHz, serial bus pipeline is 1, 2 sets of data are transmitted per clock, encoding method is 8b/10b, its bandwidth is 476.84 MB/s, that is, 3814.7 Mbps. (The bandwidth is 3.75 times that of PCI.)
The formula is 2500000000(Hz) * 1/8(bit) * 1(pipeline) * 8/10(bit) * 2(2 sets of data transmitted per clock) = 500000000 B/s = 476.8371582 MB/s, or 3814.6972656 Mbps.
The bandwidths of other types of combinations are given below.
------The bandwidth of PCI Express x2 is 953.68 MB/s, or 7629.4 Mbps. (This mode is only used for the motherboard internal interface, not the slot mode)
------The bandwidth of PCI Express x4 is 1907.36 MB/s, or 15258.9 Mbps.
------The bandwidth of PCI Express x8 is 3814.72 MB/s, or 30517.8 Mbps.
------The bandwidth of PCI Express x16 is 7629.44 MB/s, or 61035.5 Mbps. (The bandwidth is 3.75 times that of AGP 8X.)
------The bandwidth of PCI Express x32 is 15258.88 MB/s, or 122071 Mbps.
9. XGMII/XLGMII/CGMII
In the Ethernet standard, the interfaces corresponding to the 10Gbps/40Gbps/100Gbps rate levels between the MAC layer and the PHY layer are XGMII/XLGMII/CGMII. Since XGMII/XLGMII is a parallel bus and uses a single-ended signal and HSTL level, the maximum transmission distance is only 7cm. Therefore, in practical applications, XGMII/XLGMII is basically replaced by XAUI/XLAUI. XAUI/XLAUI is a four-channel serial bus that uses differential signals, CML logic transmission, and scrambling, which greatly enhances the signal's anti-interference performance and increases the signal's effective transmission distance to 50cm.
XAUI/XLAUI are the same in physical structure, with independent transceiver channels and four pairs of differential signal lines. For the XAUI bus, the data rate on each pair of differential lines is 3.125Gbps, the total data bandwidth is 12.5Gbps, and the effective bandwidth is 12.5Gbps*0.8=10Gbps (because the XAUI bus data is converted to 8B/10B before transmission, and the coding efficiency is 80%).
For the XLAUI bus, the data rate on each pair of differential lines is 10.3125 Gbps, the total data bandwidth is 41.25 Gbps, and the effective bandwidth is 41.25 Gbps*(64/66)=40 Gbps (because the XLAUI bus data is converted to 64B/66B before transmission, the encoding efficiency is 96.97%).
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