Go your own way and let the SI engineer decide

yvonneGan

Go your own way and let the SI engineer decide [Copy link]

SI engineer: "You may need to change all the routing for this part."

I didn't expect to get this answer from the SI engineer: "No, I'm serious."

A few short sentences can actually mean a lot. They not only reflect the SI engineer's seemingly professional judgment, but also express the helplessness and confusion of the customer and PCB engineer. At the same time, they also deeply reveal the unsmooth communication between them (please use your imagination to make up the crying and laughing expressions). Well, forgive me for not getting to the point. As an SI engineer, I understand the confusion of the customer and PCB engineer. This is the third product of the same type designed by the customer in our company. It has the same main control chip , particles and speed. It is an upgrade of the previous version. From the customer's perspective, it is natural to think that the same routing topology as before is ok. Please let me introduce the technical background of this project in detail. This is a nand flash design. We all know that its chip probably looks like this.

(, downloads: 0)

This chip will have two channels. From the customer's approach to these versions, it can be seen that the customer is quite adventurous and innovative. Their detailed solutions are as follows:

(, downloads: 0)

As the saying goes, the picture is rough but the principle is not rough. We know that the number of channels of each nand flash master chip must have an upper limit. If you want to continuously increase the capacity, it is not enough to simply increase the number of flash chips. More importantly, the channels need to be reused. Just like the three versions of the customer, in the first version, each channel drags a channel of a particle chip, which is the simplest one-to-one structure; in the second version, each channel drags a channel of two particles, which is a one-to-two structure; the third version is very powerful, each channel drags two channels of two particles at the same time, which is a one-to-four structure from a topological point of view, so that the channel of the master chip can connect more particles.

There is no topology to speak of in the point-to-point structure. At the conventional 533M rate, basically, there is no problem if you control the impedance of the trace well. When the customer tried the one-to-two structure in the second version, he gave priority to the fly-by topology, as shown in the figure above, and found that it was okay and the signal quality could meet the requirements. Then it came to the third version, which is the focus of this article, the one-to-four topology, and the previous problems appeared. The customer still thought that there would be no problem with the fly-by structure. As an SI engineer, I can understand the customer's mentality. Of course, the successful topology of the previous version can be directly moved to this version. The mentality may be like the following six words.

However, our SI engineers are very rigorous. No matter how helpless the customer's explanation is or how tight the board time is, we will respond with simulation

results. We choose a control signal WE for simulation. The fly-by topology originally designed is like this:

(, downloads: 0)

We can clearly see that the particles are placed with the front and back attached, and the two channels of each particle are also merged together to form a one-to-four topology. After simulation, the result is as follows:

(, downloads: 0)

Here only the waveforms received by the two pins with differences are listed. Why are there only two? This structure is similar to a fly-by plus a small T. Therefore, the waveforms of the first two pins and the last two pins in the figure above are almost the same. Therefore, for the sake of easy understanding, two waveforms with large differences are listed here. We can see that the red waveform looks OK because it is the waveform at the end, but the blue waveform looks very bad, with various non-monotonic and back grooves, which definitely does not meet the requirements. The reason is that these two pins are in the middle of the link and will be subject to a lot of reflection.

At this time, it is obviously impossible to insist on the fly-by topology. As an SI engineer, it is not only necessary to verify the topological problems, but more importantly, to find a topology that can be optimized. At this time, the editor used his unskilled layout ability to reluctantly draw the optimized topology he thought of, which is as follows:

(, downloads: 0)

After the simulation directed and performed by himself, it was found that the effect was actually quite ideal (in fact, the editor was a little bit unsure in his heart, deliberately creating an atmosphere of surprise).

(, downloads: 0)

First of all, we can see that the intuitive difference between the T topology and the fly-by topology is that the timing of the two groups of pins is consistent and the waveforms are overlapping. In addition, due to the symmetrical structure of the T topology, the reflections can be offset to a great extent, so it can maintain a good waveform of its own. So far so good! ! !

Of course, the customer and the PCB engineer accepted my suggestion for change based on solid evidence, but ideals are often full, and reality is a little skinny. This change may be a little bigger than they imagined, yes, a little bigger.

Why do I say that? Therefore, after changing the topology, the entire set of routing needs to be changed together, including address control and data, which need to be changed to T topology. The more fatal point is below. Do you think there are only one or two channels? In fact, it is like this:

(, downloads: 0)

Sorry, I can't bear to list them anymore. This case of injury tells us that sometimes experience and previous versions alone are not enough for you to invest in new boards. In this era of increasing speed and complex topology, a new trick may be a bit outdated. Sometimes if you make a channel first and let our SI engineers take a look, you may not have to stay alone in the company at 11 o'clock in the evening. There is a popular saying in our SI industry in recent years that there will be a spring for SI in the future. I hope that our spring is also the spring for customers and PCB engineers, and it does not make you feel that it has increased your work and processes.

This content is originally created by yvonneGan , a user of EEWORLD forum . If you want to reprint or use it for commercial purposes, you must obtain the author's consent and indicate the source

lingking

Why is flyby here worse than that topology?

Go your own way and let the SI engineer decide [Copy link]

Latest reply