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During the circuit design process, application engineers often overlook the layout of the printed circuit board (PCB). A common problem encountered is that the circuit schematic is correct, but it does not work or only operates at low performance. In this blog post, I will show you how to properly layout the circuit board of an operational amplifier to ensure its functionality, performance, and robustness. I recently worked with an intern on a design using the OPA191 op amp in a non-inverting configuration with a gain of 2V/V, a load of 10kΩ, and a supply voltage of +/-15V. Figure 1 shows the schematic of the design. Figure 1: Schematic of the OPA191 in a non-inverting configuration I laid out the board for the design, gave him some general guidance on PCB layout (i.e., keeping board trace paths as short as possible while keeping components close together to minimize board space), and left him to his own devices. How hard could it be? It’s just a few resistors and capacitors, isn’t it? Figure 2 shows the layout of his first attempt at the design. The red lines are the paths on the top layer of the board, while the blue lines are the paths on the bottom layer. Figure 2: First Layout Attempt At that point, I realized that the board layout was not as intuitive as I had thought; I needed some more detailed guidance. He followed our advice exactly in his design, shortening the trace paths and placing the components close together. But this layout could be improved further to reduce the board parasitic impedance and optimize its performance. The first improvement we made was to move resistors R1 and R2 closer to the inverting pin (pin 2) of the OPA191; this helped reduce the stray capacitance at the inverting pin. The inverting pin of an op amp is a high impedance node and therefore has a high sensitivity. Long trace paths can act as wires and couple high-frequency noise into the signal chain. PCB capacitance at the inverting pin can cause stability issues. Therefore, the contact on the inverting pin should be as small as possible. Moving R1 and R2 to pin 2 allows the load resistor R3 to be rotated 180 degrees, which allows the decoupling capacitor C1 to be closer to the positive supply pin (pin 7) of the OPA191. It is extremely important to keep the decoupling capacitors as close to the supply pins as possible. Long trace paths between the decoupling capacitors and the supply pins increase the inductance of the supply pins, which degrades performance. Another improvement we made was to the second decoupling capacitor, C2. The via connection from VCC to C2 should not be placed between the capacitor and the supply pin, but should be placed where the supply voltage must pass through the capacitor to enter the device supply pin. Figure 3 shows how moving each component and via improves the layout. Figure 3: Improved layout component locations Once you have moved the components to their new locations, you can still make some additional improvements. You can widen the trace paths to reduce the inductance, which is equivalent to the size of the pads to which the trace paths connect. You can also perfuse the ground planes on the top and bottom layers of the board to create a solid, low-impedance path for the return current. Figure 4 shows our final layout. Figure 4: Final Layout The next time you lay out your printed circuit board, be sure to follow these layout practices: Keep the connections to the inverting pins as short as possible. Keep the decoupling capacitors as close to the power pins as possible. If multiple decoupling capacitors are used, place the smallest decoupling capacitor closest to the power pins. Do not place vias between the decoupling capacitors and the power pins. Wide the trace paths as much as possible. Do not make 90-degree angles in the trace paths. Use at least one solid ground plane. Don't sacrifice good layout just to use silkscreen to identify components.
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