[NXP Live Review] LPC55S69: General-purpose secure low-power MCU with ARM Cortex-M33 core (including video, PPT, QA)[Copy link]
Live Details: Click here to view Live Time: March 5, 2019 (Tuesday) 10:00-11:30 AM Live Content: The live broadcast introduced NXP's LPC55S69 series MCU based on the Cortex-M33 core, and examined this high-performance, low-power, and high-security general-purpose MCU from six perspectives: core, peripherals, power consumption, performance, security, and application.
1. Questions about the basic features of the chip (focus: selling points, dual-core, power consumption, Coretex-M33, DSP|PowerQuad, cost performance)
No.
Question content
Answer content
1
What functions and advantages does LPC55S69 have over previous models?
Compared with other MCUs, LPC55S69 supports TrustZone technology to ensure the security of user assets
2
Why does the video say that this 180MHZ processor is comparable to the 300MHZ processors on the market? The main frequencies are obviously so different, how to explain it?
The dual-core mechanism reaches 200MHz, and the digital signal processing performance is accelerated by PowerQuad
3
Is this dynamic power consumption single-core or dual-core, and what is the environment like?
The dynamic power consumption is 32uA/MHz for single-core, and about X2 and a little smaller for dual-core.
4
Brother Dong, is LPC55S9 using 28nm or 40nm process now?
40nm, the cost-power-optimal node process
5
Are there any specific experimental parameters for the low power consumption of the chip? Will the specific implementation plan be introduced in detail?
There is an introduction in the PPT, dynamic power consumption 32uA/MHz single core
6
What I am most concerned about is power consumption. We are in the three-meter industry,
Single core 100MHz, two CM33 cores integrated on chip
9
PowerQuad can only support single-precision floating-point operations?
Most computing engines support fixed-point and single-precision floating-point numbers
10
Are the instruction sets of PowerQuad and CASPER coprocessors specially defined by NXP? Is there any C compiler support?
Hello, SDK provides C interfaces for related functions.
11
What are the advantages of PowerQuad coprocessor in terms of execution efficiency compared with pure software calculation using CPU?
It has faster calculation speed and occupies less system bus resources
12
Does the accelerated enhanced computing DSP of LPC55S69 increase its computing power or something else?
The hardware acceleration coprocessor PowerQuad is FFT in hardware,Special computing engines are designed for matrix calculations and other massive data calculations.
13
How big is the internal FLASH and RAM of LPC55S69?
Up to 640 KB on-chip flash program memory with a flash accelerator and 256-byte page erase and write Up to 320 KB total SRAM consisting of 288 KB on the system bus and 32 KB on Core Bus
14
Does LPC55S69 MCU have stand by and idle working modes? What is the current in these two modes respectively?
What other advantages does it have in IoT applications, besides security?
Low power consumption and multiple serial ports are also a big advantage
16
It seems that there is no MAC on the chip?
Does MAC refer to Ethernet? You can pay attention to the subsequent products of LPC5500, or you can use the LPC5460x series and then migrate to LPC5500 painlessly.
17
Is there a floating point unit?
Yes
18
Is there a dsp accelerator?
The hardware integrates the PowerQuad coprocessor, which is used to accelerate FFT transformation, matrix calculation and other calculations.
19
How many serial ports does LPC55S69 have?
Flexcomm Interface contains up to nine serial peripherals. Each Flexcomm Interface can be selected by software to be a USART, SPI, I2C, and I2S interface
20
What communication protocols does LPC55S69 support?
Supports UART, I2C, SPI, I2S, USB, SDIO and other communication protocols
21
What are the package types?
Available in HLQFP100, VFBGA98, and HTQFP64 packages
22
What is the operating temperature?
Operating temperature range -40 °C to +105 °C
23
Does LPC55S69 have an integrated DC-DC converter? Is the flash memory 640K?
The actual part that can store programs and data is 608K. For details, please refer to UM and DS
24
How many channels does the ADC have?
16-bit ADC with five differential channel pair (or 10 singled-ended channels), and with multiple internal and external trigger inputs and sample rates of up to 1.0MSamples/sec. The ADC supports two independent conversion sequences Integrated temperature sensor connected to the ADC
25
What is the USB speed?
LPC55S69 has two groups of USB, one high-speed USB, clock 480MHz, one full-speed USB, clock 48MHz
26
Does it support USB OTG?
USB 2.0 full speed host/device controller with on-chip PHY and dedicated DMA controller supporting crystal-less operation in device mode USB 2.0 high-speed host/device controller with on-chip high-speed PHY
27
Dual-core processing architecture means that the two cores work in different states, right? They can't work at the same time?
They can work at the same time
28
Is the entry for starting the dual-core CPU the same? Is the clock configuration the same?
Yes
29
What is the current price of LPC55S69 in the market? Does it have any advantages over its peers?
There are not many companies that have released Cortex-M33 on the market. With the LPC55S69 process, the price/performance ratio is not a problem
30
The Cortex-M33 microcontroller has TrustZone, floating point unit (FPU) and memory protection unit (MPU). Will it be slower in video processing?
The delay of TrustZone is very small
31
What are the external interfaces?
Supports UART, SPI, I2C, I2S, SDIO,USB and other peripheral interfaces
32
Are CPU0 and CPU1 relatively independent?
Yes
33
Do most NXP processors now integrate floating point units? If so, will DSP chips gradually lose their advantages?
LPC5500 has PowerQuad hardware DSP engine. NXP will provide chips with stronger DSP capabilities in the future. Please continue to pay attention.
34
The serial interface can be flexibly configured, that is to say, any interface can be configured with up to 8, can it be configured with up to 8 SPI
Yes, any FLEXCOM can be configured as SPI, or I2C, uart
35
Can you introduce the secure GPIO in detail?
Hello, for details, please refer to the AN on the official website: Secure GPIO and Usage
36
Does LPC55S69 have built-in SD card function? Can it be directly connected to the SD card for reading and writing?
EVK The development board is designed with an SD card slot, and the SDK package also provides SD card reading and writing programs
37
Is there a video interface? Can a camera be connected?
No dedicated camera interface is integrated yet
38
How big is the chip's own flash?
Up to 640 KB on-chip flash program memory with a flash accelerator and 256-byte page erase and write Up to 320 KB total SRAM consisting of 288 KB on the system bus and 32 KB on Core Bus
39
Does it support external SDRAM?
No dedicated interface peripherals have been integrated yet
40
How many bits are there in TRNG true random numbers?
Hello, 256 bits. For details, please refer to the User Manual.
41
Will the execution speed of the chip be affected if the program is decrypted and executed at the same time?
Hello, the PRINCE provided by LPC55S69 will not affect the performance of the chip under CoreMark test.
42
I mainly care about low power consumption. Is the principle of achieving low power consumption mainly in sleep mode? Or does the average clock power consumption have to be relatively low?
In general, the difference between the two brands in sleep mode is not too big, but the main difference is the power consumption in dynamic mode. Reducing dynamic power consumption helps to reduce average power consumption
43
Currently, this chip has several low-power modes, which ones can be woken up by the serial port SPI
Supports four modes: sleep, deep sleep, power down and deep power down. Except for the deep power down mode, all support serial port or SPI wakeup
44
How many CAN buses does LPC546xx support at most
LPC546xx has two CANs, or two CAN-FDs
45
How many MIPS can LPC55S69 achieve?
This is the core-related M33 core, which is 1.50MIPS
46
What are the performance parameters of the integrated buck module? For example, from what range of voltage to what voltage?
0.95V-1.2V. Wake-up time 100uS
47
What does the hardware protection of the functional block diagram in LPC55S69 mean?
Hardware protection refers to the linkage of PUF and PRINCE to protect the data and programs in the user's Flash
48
What is the processing power of the Cortex-M33 CPU?
What is the main function of NXP's automatic programmable logic unit?
Realize simple logic AND or NOT on the IO port to reduce the software calculation overhead
52
Is there an integrated temperature sensor inside? Is it accurate? Yes, refer to the datasheet.pdf[/url]
53
How many PWM outputs does it support
SCT supports 10 outputs
54
The last 20 pages of the on-chip flash in the manual are reserved for 10k. What is this reserved for?
PFR, reserved for user keys and configuration
55
Is there a hardware watchdog?
Is there a hardware window watchdog
56
Does LPC55S69 have a built-in LCD controller? What are the advantages and differences between it and M3 FSMC?
Hello, LPC55S69 does not have LCD controller.
57
Is the speed of this CPU equivalent to the original M4?
It is more than 15% faster than M4
58
What is the block division of on chip flash?
32KB per Sector, 8KB per Page
59
LPC55S69 has 5 32-bit timers, are there any 16-bit timers? Are there any 16-bit timers?
We only have 32-bit timers, not 16-bit timers. SCT can be split into 2 16-bit timers
60
How is the ESD protection?
Human body model 2000V
61
What are the advantages of this MCU?
The biggest advantage is security, followed by cost performance, and also excellent processing performance and energy consumption
62
Which series of LPC1768 can be compatible with?
LPC40xx, LPC541xx and LPC55xx are almost compatible with LPC1768
63
How do CPU and CPU2 work together
CPU0 and CPU1 are synchronized and exchange data by a MailBox mechanism. In theory, the two cores on LPC55S69 are not equal.
64
Does the security mechanism of partitioning require a dual-core architecture to support it?
TrustZone technology is used to implement secure partitioning, which has nothing to do with whether it is a dual-core or not
65
What are the advantages of the M33 core compared to others?
The M33 has better performance, which can be seen from the CoreMark running points. The performance has increased by at least 15%. Moreover, most of the M33 cores use more advanced processes and have better energy consumption.
66
LPC5500 is a 32-bit processor. What does it mean when the technical documentation says that it allows 64-bit parallel access?
64-bit parallelism is for coprocessors such as PowerQuad and CASPER.
67
I have two questions: 1. How many channels does the ADC have? 2. Does it support CAN communication?
1 ADC, 10 channels for single-ended, 5 channels for differential. LPC55S69 does not have CAN, but LPC55S2x and LPC55S7x have CAN.
68
Is the ADC of LPC55S69 16-bit? What is its highest sampling frequency, and how many sampling methods does it support?
16-bit ADC with five differential channel pair (or 10 singled-ended channels), and with multiple internal and external trigger inputs and sample rates of up to 1.0MSamples/sec. The ADC supports two independent conversion sequences Integrated temperature sensor connected to the ADC
69
Can PowerQuad work in parallel with the Arm core?
Yes, PowerQuad is a coprocessor and can be regarded as an independent dedicated computing core outside the dual-core system
70
For IoT products, package miniaturization is more important. Will LPC5500 produce ICs with small packages?
There is VFBGA98 7x7 package, and CSP will be available later
Is there a QFN small package for the 71
chip?
It will be available later
(II) Chip security features and encryption-related issues (focus: PUF, algorithm, verification)
No.
Question
Answer
1
How is the security of LPC55S69 reflected?
Hello, we provide Secure boot, hardware encryption engine, special key management peripheral PUF, and real-time flash encryption and decryption engine PRINCE
2
How is product security considered
M33 supports TrustZone, users can put important resources in the system security zone to ensure asset security.
3
May I ask:How does the M33 MCU achieve hardware encryption?
It provides hardware AES encryption engine and hardware PRINCE real-time flash encryption engine.
4
What are the NXP encryption chips? What are the specific algorithms and security levels?
NXP has LPC55Sxx, LPC54Sxx, K8x and other MCUs that support security, as well as dedicated security chips such as A71.
5
Can the PUF root key be modified according to user customization?
Hello, user-defined keys can be managed through PUF.
6
PUF uses the randomness of SRAM power-on to generate a digital fingerprint. Is this digital fingerprint stable? Will it change with the environment?
Hello, PUF is very reliable and stable.
7
How is security verified? What are the ways and methods? ARM has an official certification system PSA, and LPC55S69 has passed level 1. Is there an introduction to the mechanism of security debug verification? Can you explain it? Follow our WeChat official account, we will launch an article. How to test and verify security functions? Refer to ARM's PSA certification, or follow our WeChat official account. How to confirm that the design has reached a certain level of security? Follow our WeChat official account and launch articles.
11
Which hardware encryption protocols are supported? Are AES and RSA supported?
AES has a dedicated IP. RSA can use CASPER. We have routines.
12
Does the LPC5500 series support security at the software level, or a combination of software and hardware? Are there any cloud applications like Microchip (508 and 608)?
What encryption algorithms can be used? Can the national encryption be used?
Hello, there is no hardware engine that directly supports the national encryption. However, LPC5500 has built-in casper, which can theoretically accelerate the calculation of the national encryption.
14
I would like to ask, after the data is intercepted and forged in the air, how can the edge device be guaranteed not to be maliciously controlled?
The root trust can be properly managed through the PUF inside the LPC5500, and the forged information can be filtered through the root trust to identify whether the data is legitimate.
15
Which hardware encryption protocols does this chip support? Does it support AES RSA?
There is a hardware AES engine, and there is also a CASPER hardware accelerator, which can accelerate algorithms such as RSA.
16
I see that this key is generated by the puf. If both sides know it, wouldn’t it be meaningless?
If it is symmetric encryption, both parties have the same key and need to manage it properly. If it is asymmetric encryption, the public and private keys are different. In addition, PUF has a series of advantages such as preventing cloning. For details, see the AN on nxp.com.
17
Does LPC55S69 support hardware encryption?
Yes, it supports hardware AES and has a unique CASPER engine to accelerate various encryption algorithms.
18
What debugger hardware and software support is needed for secure debugging? Can open source development tools support it?
You can use NXP's free MCUxpresso IDE for development. The onboard debugger is already integrated on the EVK development board.
19
We are engaged in security products. At present, the country requires the use of national encryption algorithms in information security products. I wonder if LPC55S69 can achieve this?
LPC5500 has a unique CASPER peripheral, which can theoretically provide acceleration for the national secret algorithm.
20
Is the SDK for related encryption and decryption applications officially available?
Hello, yes.
21
How does the symmetric encryption in the encryption and decryption accelerator encrypt the program?
Through the unique PRINCE engine, please refer to the AN related to Secure boot for details.
22
Hello, in a previous seminar jointly held by ARM and NXP, the update mechanism of S69 was explained, which mentioned a SBKEK. Is this a key pre-set on both the cloud and the terminal?
Hello, for details, please refer to the AN about LPC5500 Secure boot on the official website.
23
How to configure DMA as secure or non-secure?
The address where DMA is located needs to be configured through the SAU unit in TrustZone so that DMA is covered in the secure zone.
24
Compared with the GPIO of the previous chip, does the secure GPIO have any negative impact while enhancing security? In addition, does the chip still have performance advantages when encryption is not used?
Hello, there is no negative impact. For details, you can refer to the AN: Secure GPIO and Usage on the official website. Even if the encryption feature is not used, the PowerQuad and CASPER hardware engines provided by LPC55S69 can also provide acceleration for your algorithms and programs.
25
How does LPC5500 ensure security in the IoT field?
Through Secure boot, the reliable key management system provided by PUF, the real-time encryption and decryption of flash provided by PRINCE, and TrustZone and other features.
26
May I ask:What are the advantages of FLASH encryption?
You can use PRINCE to encrypt Flash in real time
27
Is the firmware integrity check implemented by the original hardware, or does the user need to download a dedicated program to implement this function?
Hello, it is supported by the ROM Code built into the chip.
28
SecureBoot verifies the firmware signature. Does it execute the code stored outside the chip? If it is inside the chip, there is no need for this, because it can be verified before writing to FLASH.
Hello, the execution is placed inside the chip, and authenticating the program is also an important means of device anti-cloning. In addition, the FLASH inside the chip may also be maliciously modified, which is also a common attack method used by hardware hackers.
29
Can the security of M33 be understood as follows: when the code in the secure area is executed, the code in the non-secure area cannot spy on the content and results of its execution, including peripheral devices?
Yes, the non-secure code can only access the secure area through the secure entry function, which is the only way
30
At which stage can the PUF be accessed and modified?
Hello, it can be operated at any stage as needed.
31
Is the security function for the non-secure area to call placed in the ROM area?
No, it is placed in the flash. For details, please refer to the TrustZone routines in the SDK package.
32
Are there more examples and information on the security module? Because there is very little information in this area, it is very difficult to get started.
Hello, please refer to the official AN and related documents, as well as the DEMO provided by the SDK.
33
Can the security encryption algorithm set a dynamic key, or is it completely implemented by hardware? Is there also an API open to the SDK?
Hello, the SDK provides relevant APIs. For details, you can refer to the official AN and SDK DEMO.
34
How does PRINCE allow the program to be executed while being decrypted? It seems a bit contradictory.
Hello, PRINCE is a unique IP of the LPC series. For details, please refer to the SDK demo and related AN documents.
35
Is the security algorithm open source?
Hello, yes, please refer to the official SDK.
36
How to coordinate the security operation of dual-core work?
Hello, please refer to the official SDK and related AN documents.
37
I want to ask how the security of secure boot is guaranteed compared to ordinary boot? Where is the general insecurity?
Secure boot provides firmware verification and encryption and decryption. Ordinary boot does not consider whether the firmware has been maliciously tampered with.
38
Can you introduce the random number generator of LPC5500? What is its level?
Hello, LPC5500 provides TRNG true random number generator.
39
Is hardware encryption real-time? For example, how long will the encryption run time using AES-256?
PRINCE is hardware real-time encryption and decryption. PRINCE does not use the AES method, which is much faster than AES.
40
How to ensure the data communication rate and security?
The data communication rate remains unchanged. This part is generally placed in the security zone and TrustZone is used for trusted execution. The performance of the MCU remains unchanged.
41
What software does the MCU security domain run? Is there any reference or recommendation?
The security domain mainly runs the user's own core code and accesses important data, such as algorithms. We will have sample programs to provide engineers with reference. There will also be technical articles
42
What aspects are security systems based on?
Software security, hardware security, near-end security, far-end security, etc.
43
What is special about Secure DMA compared to DMA in general MCUs? Does it support real-time encryption/decryption of data from devices to SRAM?
Hello, the concept of Secure does not refer to encryption/decryption, but is related to TrustZone. For details, please refer to the User Manual.
44
It is introduced that LPC55S69 has rich security functions. Does security refer to software encryption algorithms or hardware physical security methods?
Both refer to software algorithms and physical protection
45
What are the characteristics of security
Flash encryption is lossless, supports signatures, and accelerates symmetric and asymmetric encryption algorithms. PUF protects your keys, physically prevents cloning
46
What communication method is used between the dual cores to ensure communication reliability
Email mechanism is used, which is reliable. NXP has developed three generations of dual-core architecture products, from the LPC43 series, LPC541x series to the latest LPC55S6x series
47
Does the implementation of flash encryption support OTA upgrades?
Hello, yes.
48
What is the difference between symmetric encryption and asymmetric encryption? How to understand it?
Recommend a bookIllustrated Cryptography
49
Are there any reference application documents for encryption?
Hello, you can refer to the relevant AN provided by the official.
50
Is there a physical anti-attack and anti-decryption mechanism?
PRINCE
51
What are the main hardware encryption methods?
Hello, it has hardware AES engine and PRINCE engine. And it provides CASPER, which can accelerate various encryption and decryption algorithms.
52
Is the random generation of keys added with automatic algorithm calculation?
PUF and random numbers can be implemented
53
What security algorithms does this secure MCU support?
Hello, the SDK currently provides support for MbedTLS.
54
Is the key for each part of the encryption provided separately or uniformly?
The key can be configured separately for each area of the Flash.
55
For the more common MCU brute force cracking on the market, what are the countermeasures for LPC55S69? Can it be effectively used for software security?
PRINCE+PUF
Does the PUF keystore itself regenerate these keys every time the LPC55S69 starts?
Hi, yes. As long as AC and KC are provided to PUF, PUF can regenerate the key. For details, please refer to the official AN and User Manual.
IAR can be used for development, and KEIL and NXP's own MCUXpresso are also supported
2
Does it support FD CAN?
LPC55S2x series supports CAN FD, and we also have LPC54xxx series with CAN-FD
3
Does it support dynamic frequency adjustment?
Yes, we provide Power API.
4
Can MCUXpresso support the development of this series of MCUs? Is there an SDK?
Yes
5
I used stm32f107 and 407 before. Is the migration cost high?
NXP provides a complete SDK code package and mature API. Powerful MCUXpresso configuration tool. MCUXpresso IDE is one of the most user-friendly, stable and free IDEs in the industry. Migration is not free of cost, but our ecosystem can help you reduce more costs from another direction.
6
What types of sensors does the LPC55S2x series support?
Sensors with interfaces such as SPI, I2C, and UART are supported, and all common sensors on the market are supported. At the same time, we introduced the MIPI I3C interface to support future sensors
7
What official LPC55S69 development boards are available
Is the source code debugged on LPC54XXX before easy to transplant?
Hello, it is very easy to transplant. Due to the support of NXP SDK, most of the BSP APIs are the same.
10
Can I use general development tools to develop LPC55S69, such as STLINK V9?
Jlink and open source CMSIS-DAP
11
1. This chip looks very attractive. Since it is based on the same level as M4, DSP instructions are also indispensable. In this way, the CMSIS-CNN program can be transplanted.
Can it support CMSIS-NN
12
Can it run Linux?
Not supported yet
13
2. When I used the new product before, the SDK was not always synchronized, and many functions could not be accessed. I had to look at the source code before I could use them. I hope the documentation support will be more sufficient this time. The code on LPC54114 can also be ported relatively well
Well, before the release, we have found several groups of award-winning teams who participated in our company's dual-core competition to port from LPC54114 to LPC5500. The effect is very good
14
What are the characteristics of the development method on the traditional DSP platform?
Fully compatible with the ARM development ecosystem
15
What development environments are supported?
MCUXpresso IDE, KEIL, IAR, ARMGCCl
16
Dual-core development is difficult. Are there any relevant example tutorials?
Not difficult. There are a lot of sample projects in the MCUXpresso SDK code for reference
17
Can two cores be debugged at the same time?
Can you debug simultaneously on MCUXpresso IDE
18
What features or support does it have in terms of audio codec?
Supports multiple I2S buses, the internal PowerQuad hardware acceleration coprocessor can perform FFT,Data processing processes such as matrix operations are significantly accelerated
19
Does LPC55S69 have its own USB2.0 port? If it is USB2 . Can 0 products achieve USB2.0 data transmission without using other chips?
Yes, USB2.0 transmission can be achieved without additional USB devices
20
Is there a good LINUX SDK for LPC5500?
LPC5500 is an MCU without an MMU, so it does not support Linux. If you need Linux, you can refer to our IMX series. If you want to run RTOS on LPC5500, you can refer to FreeRTOS
21
Has the latest pack package been released for LPC55S69 in Keil?
Hello, it has been published.
22
Is the SAU configuration completed in ROM?
Can be configured in the system init function during system initialization
23
Non-security Zone access to the security zone, is there any specific implementation routine?
Yes, the SDK package provides TrustZone routines
24
Is freertos or other real-time operating system currently used in the SDK
The SDK currently supports FreeRTOS
[tr][td =95]25
Does onchip ROM support serial port or other program programming?
Hello, support.
26
SDK build Is it right to ignore the operating system of the development computer where the IDE is located?
Users need to determine which platform to use on themselves. MCUXpresso SDK Builder supports most mainstream platforms
27[/td][td =337]What is the difference between linux SDK and Windows SDK?
Differences in tool chain support, the codes are basically the same.
28
Oh, sorry, I found the ISP introduction of on chip ROM. So where can I get the relevant ISP agreement?
Hello, for details, you can refer to the User Manual
29
Use dual-core OS Of?
Can the OS-independent
30
support wireless communication modules?
Hello, we can support it.
31
Can MCUXpresso Config Tools generate initialization code?
Hello, yes.
32
Is there a reference code for IPC communication between dual cores?
Hello, please refer to the official SDK, SDK provides rich DEMO.
33
Can graphical interface programming be supported in the future?
MCUXpresso Config Tool provides a graphical development interface
34
Are there any underlying hardware generation tools?
MCUXpresso Config Tools can be downloaded from mcuxpresso.nxp.com
35
CAN bus bootload Is there a routine?
Yes, please refer to LPC546xx’s AN
36
Does it support boot? And at ultra-low What should you pay attention to when starting the boot under power consumption
Support boot, pay attention to the configuration when starting the boot
37[/td][td =337] Is the 32uA/MHz dynamic power consumption when the DC-DC buck converter is enabled?
Yes
38
In low power consumption mode, the SD card runs to the highest frequency , what is the system frequency?
The main frequency of the system is 100MHz, the SD card is 52MHz
39
The ADC conversion module is several independent Yes, can simultaneous sampling of multiple signals be achieved?
The ADC conversion module is an independent one. If differential is enabled, synchronous sampling of multiple signals can be achieved
40
How are the two kernel programs downloaded and executed?
Download and debug through IDE and Debugger
41
After development based on windowSDK, you can directly run it on the linux system Compile it?
It is recommended that you use MCUXpresso IDE for development, which supports Windows and Linux.
42
Does MBED support?
Not supported yet
43
Is there an adapted motor driver?
Not yet
44
Does LPC55S69 have FSMC function? Can it directly drive a color screen?
Can directly drive the color screen through high-speed SPI
45
How to set the password and initialization vector for LPC55S69 To the user configuration area?
Just call the PFR API in the SDK, we have AN instructions
46
LPC55S69 CRC Is the engine set through register configuration?
Yes, simple configuration of registers is required
47
Can it support deep learning or AI
/td][td=350]Hello, yes, it supports CMSIS-NN and has hardware acceleration engines PowerQuad and CASPER.
48
Is there a DEMO board for LPC5500?
Yes, see [url=https://www.nxp.How should the dsp accelerator be used? What software resources are needed?
Refer to the sample program of PowerQuad driver in MCUXpresso SDK, and pay attention to the application notes published on the official product page
50
Is there any DSP library for optimizing FFT algorithm
The FFT transform engine of PowerQuad coprocessor provides hardware-level acceleration
51
Can the data processed by DSP be reduced by DMA to reduce the CPU usage of calculation
Hello, LPC55S69 has an independent hardware DSP acceleration engine PowerQuad, which will not occupy the CPU when performing DSP calculations.
52
What programmable program is the dsp board based on?
Hello, the PowerQuad built into the LPC55S69 can be developed based on C language. You can refer to the SDK provided by the official.
53
Does low power consumption prohibit many functions?
Hello, power consumption and performance are two sides of the same coin. You need to make a choice based on actual needs.
54
How does the dual core realize program development? Is it to develop separately or as one project?
Hello, separate project development. For details, you can refer to the project templates and DEMO provided by the official SDK.
55
Is it more troublesome to upgrade a dual-core remotely than a single core, as each core needs to have its own bootloader to manage the upgrade?
No, they are all on the same Flash and can be managed by one bootloader.
56
So is the communication between CPU0 and CPU1 full-duplex or instantaneous unidirectional?
Full-duplex
57
Does LPC55S69 have advanced peripherals, such as USB or CAN?
LPC55S69 has two USB channels and one is high-speed USB, but no CAN. LPC55S2x series has USB high-speed and CAN-FD.
58
If there are any practices to enhance the performance of robot learning, please introduce them, thank you!
We have a dedicated AI Webinar, you can search for it
59
Where are the case design solutions for the security application of the Internet of Things?
Based on AWS Amazon demo, and electronic locks
60
Is there a corresponding SDK available now? Are there corresponding examples to learn? It can speed up the learning process.
Yes, you can download it from mcuxpresso.nxp.com. The code package contains instructions for the examples. You can also follow NXP MCU’s official account. We will publish an article after the PPT is finished.
61
Is there a demo board for LPC55S69? How to apply for or purchase it?
(IV) Questions related to application scenarios (case studies, environmental conditions)
Serial number
Question content
Response content
1
Is there a complete solution for edge nodes?
There is a reference solution for AWS Amazon, refer to AN www.nxp.com
2
Industrial specification or automotive specification?
Industrial specification, -40-105 degrees Celsius
3
What occasions is LPC55S69 mainly suitable for? Does it currently support mainstream IAR KEIL?
LPC55S69 can be used in embedded applications with high security performance requirements. It currently supports Keil, IAR,MCUXpresso Development
4
Is LPC55S69 suitable for automotive electronics?
If it is for the aftermarket, or the original equipment market does not need automotive regulations, you can use LPC55S69
5
Main application areas of products
Low-power sensing, industrial control, white goods, motor control, etc. Mainly for the general market, see if the peripherals are suitable for your application
6
Can it be used in finger vein biometric devices?
Hello, you can use the PowerQuad and CASPER hardware engines to accelerate your algorithm.
7
What are the target application scenarios of LPC5500, especially TrustZone technology?
Embedded applications with high security requirements, such as IoT nodes, E-lock, etc.
8
In addition to fingerprint recognition verification, is there any voice recognition verification?
Hello, yes.
9
What is the lowest power consumption of LPC55S69? What are the applications?
32uA/MHz dynamic power consumption, general market, such as IOT, industrial control, etc.
10
Can it be used in automotive electronics?
If there is no requirement for automotive regulations, industrial grade is fine. It depends on the demand.
11
What devices are LPC55S69 used for?
General market, you will see LPC55S69 in the future
12
Does this material have experience in large-scale field use?
It has been used by major customers
13
Mr. Liu, what are the current application needs
IOT, and anti-cloning of your own products. Who doesn't want a product to be copied tomorrow after it's launched today?
14
This chip can be used in smart projectors
You can consider using it as a bridge chip for sensors, or to directly control the motor of the lens
15
2KV is not high, but does the actual circuit need an additional ESD protection device?
It depends on the actual product requirements
16
May I ask:Can LPC55S69 and LPC55F69 be directly replaced by hardware?
Can LPC55S69 be directly replaced with each other
17
For motor control, does the number of PWM channels support four motors
It's a bit too much, you can consider NXP's KV series MCU
18
Can LPC55S69 MCU be used in automotive electronics? What is the operating temperature range?
This series is industrial grade, -40-105 degrees Celsius
19
Does it support intelligent learning function?
With the main frequency and capabilities here, we can only do inference. Learning still depends on MPU or dedicated IC
20
Can LPC55S69 be used in automotive electronic door lock projects?
Is industrial specification OK? Or must it be automotive specification? There is no hope for automotive specification. Industrial specification is completely fine
21
LPC55S69 dual-core operation mechanism, if the main core watchdog resets, can the slave core still work normally?
The watchdog resets the chip together
22
Does LPC55S69 need to send heartbeat packets to maintain connection with external devices after entering low power mode?
It depends on the needs of external devices
23
It can be used in simple control fields. How about anti-interference
ESD 2000V
24
Can you give a specific example of your excellence in low power consumption and make a comparison? Some of our products are now powered directly by three AA batteries.
Minimum 590nA
25
Is there a small package like this for use in small spaces
CSP package will be available later
26
Does it support expanded storage?
For storage, you can use external SPI Flash
27
How is the real-time performance of LPC5500 after loading FREErtos? What is the current latency level?
It is consistent with M3 and M4
(V) Encyclopedia (ununderstood concepts)
Serial number
Question content
Answer content
1
What is the biggest difference between the M-core MCU and the A-core processor? Why is one called an MCU and the other a CPU?
The M core is mainly for real-time control. Its interrupt latency is much better than that of the A core. However, the M core does not have an MMU. It can only run RTOS, not RichyOS. The cost is lower than that of the A core, the power consumption is lower than that of the A core, and the performance is also lower than that of the A core.
2
Is there any difference between the M33 and M4 in development?
They are similar in development. For the M33, you need to pay extra attention to the configuration of TrustZone.
3
What are the characteristics of the M33 core?
M33 is based on ARMv8m, the new instruction set architecture of ARM, and M0-M7 is based on ARMv7. M33 mainly optimizes the performance of instruction execution, adds a coprocessor bus, and adds TrustZone optimized for the M core. At the same time, the MPU is also optimized. Both performance and power consumption have been greatly improved
4
What are the main features of NXP single chip?
The family series is complete, and the general-purpose and special-purpose MCU series include LPC, Kinetis, and RT. IOT has three series: JN, QN, and KW. Unified development of the ecosystem with MCUXpresso, API compatible. There is also NXP's IMX series, which is the only manufacturer on the market that can cover MCU and MPU. One-stop support.
5
What is the concept of PUF key injection
Hello, for details, please refer to the PUF related AN on the official website.
6
What are the improvements between LPC55S69 and CORTEX M23!
The same average power consumption brings 100% performance improvement
7
How does the CoreMark of Cortex-M33 and Cortex-M7 series compare?
Two development directions, M33 focuses on energy consumption and security. M7 focuses on performance.
8
What does the state machine introduced by the state configurable timer mean compared to the general timer?
State machine + timer = more powerful timer
9
I can understand that the mechanism of prince is a simplified version of AESCTR?
Hello, yes, you can understand it this way.
10
What is a fractional divider?
Reduce the bit error rate of the serial port baud rate
11
What is the obvious difference between the code corresponding to the CORTEX-M33 core and the M0~M7 series? Is Trust_zone introduced? NXP has an encryption chip SHA256. Does this have overlapping functions with the security chip? Can it be used compatible with each other?
Compared to M0-M7, the performance of M33 is at least 15% higher than that of M0-M4. For M7, the development is slightly simpler. There is no overlap with other NXP security chips. If engineers need a more secure execution environment, they need to use additional security chips.
12
What is the difference between the M23 and M33 cores?
Hello, in short, the M33 is stronger than the M23 in performance. For details, please refer to the relevant documents on the ARM official website.
13
How to implement program self-destruction in lpc55s69?
Software intervention is required. ARM has released a new version of the V8M kernel that supports self-destruction, which will be supported later.
14
When CPU1 completes the co-processing task, how to notify CPU0?
Through the Mailbox mechanism
15
Does the communication between CPU0 and CPU1 go through cache or shared memory
Shared memory
16
Then I still don't understand. Once the two cores operate the same on-chip peripheral at the same time, or enable the same interrupt at the same time, how will the two cores behave? In addition, how do the peripheral bus and the two cores cooperate?
This requires the user to do a good job of task management and peripheral management during design. In theory, each core has its own interrupt vector table and its own interrupt service routine. When an interrupt comes, and this interrupt is enabled in both cores. The two cores execute their own interrupt tasks respectively
17
Is the MAC address written in by the factory or does it need to be written to the FLASH by yourself like TI?
You need to write it yourself
18
I just heard the lecturer say that CPU2 will only work after the CPU wakes up. Why is it designed like this?
The audio has been answered, thanks
19
We know that there is a PUF key injection function. Can the key also be injected through the Fuse-based method?
See the audio answer, thanks
(VI) Others (purchase, samples, supply, support)
Serial number
Question content
Reply content
1
My work also participated in the finals in Shenzhen. I applied to evaluate the new product. It would be best to give a quote at the same time. What is the price for samples below 10 and batch production of 5,000 pieces? I am considering designing a security camera solution that directly supports security transmission, and I plan to use FPGA. If this can directly support security, then it will be great. I can use the FPGA solution to make a set of entry-level products.
Please follow our official account and apply for it in the background.
2
When will it be available for purchase? Will there be an official Taobao store where I can buy stocks directly?
We currently support MicroPython on LPC546xx and RT10xx
7
Is the LPC55S6X now available in a dual-core model?
LPC55S69 is a dual-core, dual M33 cores
8
NXP's information is OK, but it's all in English. There are too few Chinese ones
We will follow up quickly on Chinese. For example, isn't the PPT in Chinese?
9
Which NXP first-level agent doesn't charge shipping fee?
I don't know. I'm not sure about the rules of the agent. But since you are a customer, shipping fee is generally not required.
10
We are in urgent need of chips that can replace MSP430, mainly for power consumption and price. Many chips cannot reach TI's power consumption level
Pay attention to the LPC800 series and its subsequent new products
11
Can there be more Chinese information and application solutions on power domains and low power consumption? There are many difficult to understand introductions
You can follow NXP MCU Gas Station, there are WeChat articles about LPC55S69, all in Chinese
12
Will the LPC55S series support MicroPython?
Not supported yet
13
Is there an ARM+GPU module based on this ARM processor?
Hello, this chip is not available yet.
14
Is the 55 series evolved from the 54 series or the 43 series?
Hello, LPC55 is a brand new series.
15
Is there an external high-speed sram/sdram controller? How fast is the IO input and output speed?
The live broadcast did not design the network port performance of 5500. Are these series of materials suitable for industrial applications and industrial Ethernet development?
Consider using LPC546xx or the next LPC55S7x series
22
You said the security MCU is the 54 series, isn't that the 43 series? I think the 43S is more similar to the 55
LPC43xx -> LPC541xx -> LPC55xx
23
How many bits is the secret key?
Different encryption algorithms have different key lengths
24
Does LPC5500 support dual parallel ports?
LPC55S69 does not have it, but LPC55S7x and LPC55s8x series do support it
25
What are the external expansion buses?
There is no external parallel expansion bus yet
26
For industrial applications, dual-core and M33 options are available
LPC55S69 LQFP100 package
27
Just now you said that the differences between the companies are not far apart, which I think makes a lot of sense. Like before, I won’t say much. Apart from the complex relationship, based on our technical analysis, if the price is similar, we will consider more issues related to development and labor costs, such as the ease of use of development tools, the difficulty of getting started, the complexity of problem investigation, whether it is easy to produce, etc…
Yes
28
Does NXP currently have PPC architecture MCUs?
You can ask our colleagues in the marketing department, we are responsible for the LPC product line
pdf[/url][/td][/tr] [tr][td=95]16[/td][td=337]Is the power consumption better than TI's msp430? [/td][td=350]Which material? The best Apple2Apple comparison[/td][/tr] [tr][td=95]17[/td][td=337]Does NXP have a packaging factory in Hong Kong? How do I know if the NXP chip is original? [/td][td=350]There is no packaging factory in Hong Kong, but we have packaging factories and design departments in China[/td][/tr] [tr][td=95]18[/td][td=337]Can I understand that Prince's encryption and decryption mechanism is a simplified version of AES CTR[/td][td=350]Hello, yes, you can understand it this way. [/td][/tr] [tr][td=95]19[/td][td=337];I would like to ask whether the LPC55S6 series has introduced Dover's CorGuard technology? [/td][td=350]Not yet [/td][/tr] [tr][td=95]20[/td][td=337]Which NXP M333 CPU has the smallest size or IO? How many IOs, and how big? [/td][td=350]See data sheet https://www.nxp.com/docs/en/data-sheet/LPC55S6x.pdf[/td][/tr] [tr][td=95]21[/td][td=337]The live broadcast did not design the network port performance of 5500. Are these series of materials suitable for industrial applications and industrial Ethernet development? [/td][td=350]Consider using LPC546xx or the next LPC55S7x series[/td][/tr] [tr][td=95]22[/td][td=337]You said the security MCU is the 54 series, isn't that the 43 series? I think the 43S is more similar to the 55[/td][td=350]LPC43xx -> LPC541xx -> LPC55xx[/td][/tr] [tr][td=95]23[/td][td=337]How many bits is the secret key? [/td][td=350]Different encryption algorithms have different key lengths[/td][/tr] [tr][td=95]24[/td][td=337]Does LPC5500 support dual parallel ports? [/td][td=350]LPC55S69 does not have it, but LPC55S7x and LPC55s8x series do support it[/td][/tr] [tr][td=95]25[/td][td=337]What are the external expansion buses?[/td][td=350]There is no external parallel expansion bus yet[/td][/tr] [tr][td=95]26[/td][td=337]For industrial applications, dual-core and M33 options are available[/td][td=350]LPC55S69 LQFP100 package[/td][/tr] [tr][td=95]27[/td][td=337]Just now you said that the differences between the companies are not far apart, which I think makes a lot of sense. Like before, I won’t say much. Apart from the complex relationship, based on our technical analysis, if the price is similar, we will consider more issues related to development and labor costs, such as the ease of use of development tools, the difficulty of getting started, the complexity of problem investigation, whether it is easy to produce, etc…[/td][td=350]Yes[/td][/tr] [tr][td=95]28[/td][td=337]Does NXP currently have PPC architecture MCUs? [/td][td=350]You can ask our colleagues in the marketing department, we are responsible for the LPC product line[/td][/tr] [/table]
pdf[/url][/td][/tr] [tr][td=95]16[/td][td=337]Is the power consumption better than TI's msp430? [/td][td=350]Which material? The best Apple2Apple comparison[/td][/tr] [tr][td=95]17[/td][td=337]Does NXP have a packaging factory in Hong Kong? How do I know if the NXP chip is original? [/td][td=350]There is no packaging factory in Hong Kong, but we have packaging factories and design departments in China[/td][/tr] [tr][td=95]18[/td][td=337]Can I understand that Prince's encryption and decryption mechanism is a simplified version of AES CTR[/td][td=350]Hello, yes, you can understand it this way. [/td][/tr] [tr][td=95]19[/td][td=337];I would like to ask whether the LPC55S6 series has introduced Dover's CorGuard technology? [/td][td=350]Not yet [/td][/tr] [tr][td=95]20[/td][td=337]Which NXP M333 CPU has the smallest size or IO? How many IOs, and how big? [/td][td=350]See data sheet https://www.nxp.com/docs/en/data-sheet/LPC55S6x.pdf[/td][/tr] [tr][td=95]21[/td][td=337]The live broadcast did not design the network port performance of 5500. Are these series of materials suitable for industrial applications and industrial Ethernet development? [/td][td=350]Consider using LPC546xx or the next LPC55S7x series[/td][/tr] [tr][td=95]22[/td][td=337]You said the security MCU is the 54 series, isn't that the 43 series? I think the 43S is more similar to
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