The first part of the maximum rating parameters
The maximum rating parameters, all values are obtained under the conditions (Ta=25℃)
VDSS Maximum drain-source voltage
When the gate and source are shorted, the drain-source rated voltage (VDSS) refers to the maximum voltage that can be applied before drain-source avalanche breakdown occurs. Depending on the temperature, the actual avalanche breakdown voltage may be lower than the rated VDSS. For a detailed description of V(BR)DSS, please refer to Electrostatic Characteristics.
VGS Maximum Gate-Source Voltage
The VGS rated voltage is the maximum voltage that can be applied between the gate and source. The main purpose of setting this rated voltage is to prevent damage to the gate oxide layer caused by excessive voltage. The actual gate oxide can withstand a voltage much higher than the rated voltage, but it will vary with different manufacturing processes. Therefore, keeping VGS within the rated voltage can ensure the reliability of the application.
ID - Continuous Leakage Current
ID is defined as the maximum continuous DC current allowed when the chip is at the maximum rated junction temperature TJ(max) and the tube surface temperature is 25℃ or higher. This parameter is a function of the rated thermal resistance RθJC between the junction and the tube case and the tube case temperature:
ID does not include switching losses, and it is difficult to keep the tube surface temperature at 25℃ (Tcase) in actual use. Therefore, the actual switching current in hard switching applications is usually less than half of the ID rating @ TC = 25℃, usually between 1/3 and 1/4. In addition, if the thermal resistance JA is used, the ID at a specific temperature can be estimated, and this value is more realistic. IDM - Pulsed Drain Current This parameter reflects the pulse current that the device can handle, which is much higher than the continuous DC current. The purpose of defining IDM is: the ohmic region of the line. For a certain gate-source voltage, there is a maximum drain current after the MOSFET is turned on. As shown in the figure, for a given gate-source voltage, if the operating point is in the linear region, the increase in drain current will increase the drain-source voltage, thereby increasing the conduction loss. Long-term operation at high power will cause device failure. Therefore, under typical gate drive voltages, the rated IDM needs to be set below the region. The boundary point of the region is at the intersection of Vgs and the curve.
Therefore, it is necessary to set an upper limit on the current density to prevent the chip from being burned due to excessive temperature. This is essentially to prevent excessive current from flowing through the package leads, because in some cases, the "weakest connection" on the entire chip is not the chip, but the package leads.
Considering the thermal effect on IDM, the temperature rise depends on the pulse width, the time interval between pulses, the heat dissipation, RDS(on), and the waveform and amplitude of the pulse current. Simply satisfying that the pulse current does not exceed the IDM upper limit cannot guarantee that the junction temperature does not exceed the maximum allowable value. You can refer to the discussion on transient thermal resistance in thermal and mechanical properties to estimate the junction temperature under pulse current.
PD - Allowable channel total power dissipation
79)]The allowable total channel power dissipation specifies the maximum power dissipation that the device can dissipate and can be expressed as a function of the thermal resistance when the maximum junction temperature and case temperature are 25°C.
TJ, TSTG-operating temperature and storage ambient temperature range
These two parameters specify the junction temperature range allowed by the device's operating and storage environments. Such a temperature range is set to meet the requirements of the device's shortest operating life. If the device is ensured to operate within this temperature range, its operating life will be greatly extended.
79)]EAS - Single Pulse Avalanche Breakdown Energy
If the voltage overshoot value (usually caused by leakage current and stray inductance) does not exceed the breakdown voltage, the device will not experience avalanche breakdown, so there is no need to dissipate the avalanche breakdown ability. The avalanche breakdown energy calibrates the safe value of the instantaneous overshoot voltage that the device can tolerate, which depends on the energy that needs to be dissipated for avalanche breakdown.
[color=rgb(79, 79,Devices that define avalanche breakdown energy ratings usually also have EAS ratings defined. Avalanche breakdown energy ratings have a similar meaning to UIS ratings. EAS specifies how much reverse avalanche breakdown energy a device can safely absorb.
Where L is the inductance value, iD is the peak current flowing through the inductor, which suddenly converts to the drain current of the measured device. Avalanche breakdown occurs when the voltage developed across the inductor exceeds the MOSFET breakdown voltage. When avalanche breakdown occurs, current in the inductor will flow through the MOSFET device even if the MOSFET is in the off state. The energy stored in the inductor is similar to the energy stored in the stray inductance and dissipated by the MOSFET.
When MOSFETs are connected in parallel, it is difficult for the breakdown voltages of the different devices to be exactly the same. Usually, one device experiences avalanche breakdown first, and then all the avalanche breakdown current (energy) flows through this device.
EAR - Repetitive Avalanche Energy
Repetitive avalanche energy has become an "industry standard", but without setting the frequency, other losses and cooling, this parameter has no meaning. Heat dissipation (cooling) conditions often limit the repetitive avalanche energy. It is also difficult to predict the energy generated by avalanche breakdown.
The true meaning of the rated EAR is to calibrate the repeated avalanche breakdown energy that the device can withstand. The premise of this definition is that there is no frequency limit, so the device will not overheat, which is realistic for any device that may experience avalanche breakdown. In the process of verifying the device design, it is best to measure the temperature of the device or heat sink in the working state to observe whether the MOSFET device is overheating, especially for devices that may experience avalanche breakdown.
IAR - Avalanche Breakdown Current
For some devices, the tendency of current crowding on the chip during avalanche breakdown requires limiting the avalanche current IAR. In this way, avalanche current becomes a "elaboration" of the avalanche breakdown energy specification; it reveals the true capability of the device.
Part 2 Static Electrical Characteristics
V(BR)DSS: Drain-Source Breakdown Voltage (Destruction Voltage)
V(BR)DSS (sometimes called VBDSS) is the drain-source voltage when the drain current reaches a certain value under specific temperature and gate-source short conditions. The drain-source voltage in this case is the avalanche breakdown voltage.
V(BR)DSS is a positive temperature coefficient. When the temperature is low, V(BR)DSS is less than the maximum rated value of the drain-source voltage at 25℃. At -50℃, V(BR)DSS is approximately 90% of the maximum drain-source rated voltage at 25℃. VGS(th), VGS(off): Threshold voltage VGS(th) refers to the voltage at which the added gate-source voltage causes the drain to start flowing current, or the voltage at which the current disappears when the MOSFET is turned off. The test conditions (drain current, drain-source voltage, junction temperature) are also specified. Under normal circumstances, the threshold voltage of all MOS gate devices will be different. Therefore, the range of VGS(th) is specified. VGS(th) is a negative temperature coefficient. When the temperature rises, the MOSFET will turn on at a relatively low gate-source voltage.
RDS(on): On-resistance
RDS(on) refers to the drain-source resistance measured at a specific drain current (usually half of the ID current), gate-source voltage and 25°C.
IDSS: Zero gate voltage drain current
IDSS refers to the leakage current between the drain and the source at a specific drain-source voltage when the gate-source voltage is zero. Since leakage current increases with increasing temperature, IDSS is specified at room temperature and high temperature. The power consumption caused by leakage current can be calculated by multiplying IDSS by the voltage between the drain and the source, and this part of the power consumption can usually be ignored.
IGSS - Gate-Source Leakage Current
IGSS refers to the leakage current flowing through the gate under a specific gate-source voltage.
Part III Dynamic Electrical Characteristics
79)]
Ciss: Input capacitance
Short-circuit the drain and source, and the capacitance between the gate and the source measured by the AC signal is the input capacitance. Ciss is formed by the gate-drain capacitance Cgd and the gate-source capacitance Cgs in parallel, or Ciss = Cgs +Cgd. The device can only be turned on when the input capacitance is charged to the threshold voltage, and the device can only be turned off when it is discharged to a certain value. Therefore, the drive circuit and Ciss have a direct impact on the turn-on and turn-off delays of the device.
79)]Coss: Output Capacitance
Short the gate and source, and the capacitance between the drain and source measured by the AC signal is the output capacitance. Coss is formed by the parallel connection of the drain-source capacitance Cds and the gate-drain capacitance Cgd, or Coss = Cds +Cgd. For soft switching applications, Coss is very important because it may cause resonance in the circuit
Crss: Reverse Transfer Capacitance
79)]When the source is grounded, the capacitance measured between the drain and the gate is the reverse transfer capacitance. The reverse transfer capacitance is equivalent to the gate-to-drain capacitance. Cres = Cgd. The reverse transfer capacitance is also often called the Miller capacitance. It is an important parameter for the rise and fall times of the switch. It also affects the turn-off delay time. The capacitance decreases with the increase of the drain-source voltage, especially the output capacitance and the reverse transfer capacitance.
Qgs, Qgd, and Qg: Gate charge
The gate charge value reflects the charge stored on the capacitor between the terminals. Since the charge on the capacitor changes with the voltage at the moment of switching, the influence of gate charge must often be considered when designing the gate drive circuit.
Qgs is from 0 charge to the first inflection point, Qgd is from the first inflection point to the second inflection point (also called "Miller" charge), and Qg is from 0 point to the part where VGS equals a specific drive voltage.
79)]Drain current and drain-source voltage have little effect on gate charge, and gate charge does not change with temperature. Test conditions are specified. The gate charge curve is shown in the data sheet, including the gate charge change curve corresponding to the fixed drain current and the variable drain-source voltage. In the figure, the platform voltage VGS(pl) increases slightly with increasing current (and decreases with decreasing current). The platform voltage is also proportional to the threshold voltage, so different threshold voltages will produce different platform voltages.
The following figure is more detailed and can be applied:
[color=rgb(79, 79, td(on) ： Turn-On Delay Time The turn-on delay time is the time from when the gate-source voltage rises to 10% of the gate drive voltage until the drain current rises to 10% of the specified current. td(off) ： Turn-Off Delay Time The turn-off delay time is the time from when the gate-source voltage drops to 90% of the gate drive voltage until the drain current drops to 90% of the specified current. This shows the delay before the current is delivered to the load. tr : Rise time Rise time is the time it takes for the drain current to rise from 10% to 90%. tf : Fall time Fall time is the time it takes for the drain current to fall from 90% to 10%.79)]Short the drain and source, and the capacitance between the gate and source measured by the AC signal is the input capacitance. Ciss is formed by the parallel connection of the gate-drain capacitance Cgd and the gate-source capacitance Cgs, or Ciss = Cgs +Cgd. The device can only be turned on when the input capacitance is charged to the threshold voltage, and the device can only be turned off when it is discharged to a certain value. Therefore, the drive circuit and Ciss have a direct impact on the turn-on and turn-off delays of the device.
Coss: Output capacitance
Short the gate and source, and the capacitance between the drain and source measured by the AC signal is the output capacitance. Coss is formed by the parallel connection of the drain-source capacitance Cds and the gate-drain capacitance Cgd, or Coss = Cds +Cgd For soft switching applications, Coss is very important because it may cause resonance in the circuit. Crss: Reverse transfer capacitance When the source is grounded, the capacitance between the drain and the gate is the reverse transfer capacitance. The reverse transfer capacitance is equivalent to the gate-drain capacitance. Cres =Cgd, the reverse transfer capacitance is also often called Miller capacitance, which is an important parameter for the rise and fall time of the switch, and it also affects the turn-off delay time. The capacitance decreases with the increase of the drain-source voltage, especially the output capacitance and the reverse transfer capacitance. Qgs, Qgd, and Qg: Gate Charge The gate charge value reflects the charge stored on the capacitor between the terminals. Since the charge on the capacitor changes with the voltage at the moment of switching, the influence of gate charge must often be considered when designing the gate drive circuit. Qgs is the charge from 0 to the first inflection point, Qgd is the charge from the first inflection point to the second inflection point (also called Miller charge), and Qg is the charge from 0 to a specific drive voltage at VGS. 79)]Drain current and drain-source voltage have little effect on gate charge, and gate charge does not change with temperature. Test conditions are specified. The gate charge curve is shown in the data sheet, including the gate charge change curve corresponding to the fixed drain current and the variable drain-source voltage. In the figure, the platform voltage VGS(pl) increases slightly with increasing current (and decreases with decreasing current). The platform voltage is also proportional to the threshold voltage, so different threshold voltages will produce different platform voltages.
The following figure is more detailed and can be applied:
[color=rgb(79, 79, td(on) ： Turn-On Delay Time The turn-on delay time is the time from when the gate-source voltage rises to 10% of the gate drive voltage until the drain current rises to 10% of the specified current. td(off) ： Turn-Off Delay Time The turn-off delay time is the time from when the gate-source voltage drops to 90% of the gate drive voltage until the drain current drops to 90% of the specified current. This shows the delay before the current is delivered to the load. tr : Rise time Rise time is the time it takes for the drain current to rise from 10% to 90%. tf : Fall time Fall time is the time it takes for the drain current to fall from 90% to 10%.79)]Short the drain and source, and the capacitance between the gate and source measured by the AC signal is the input capacitance. Ciss is formed by the parallel connection of the gate-drain capacitance Cgd and the gate-source capacitance Cgs, or Ciss = Cgs +Cgd. The device can only be turned on when the input capacitance is charged to the threshold voltage, and the device can only be turned off when it is discharged to a certain value. Therefore, the drive circuit and Ciss have a direct impact on the turn-on and turn-off delays of the device.
Coss: Output capacitance
Short the gate and source, and the capacitance between the drain and source measured by the AC signal is the output capacitance. Coss is formed by the parallel connection of the drain-source capacitance Cds and the gate-drain capacitance Cgd, or Coss = Cds +Cgd For soft switching applications, Coss is very important because it may cause resonance in the circuit. Crss: Reverse transfer capacitance When the source is grounded, the capacitance between the drain and the gate is the reverse transfer capacitance. The reverse transfer capacitance is equivalent to the gate-drain capacitance. Cres =Cgd, the reverse transfer capacitance is also often called Miller capacitance, which is an important parameter for the rise and fall time of the switch, and it also affects the turn-off delay time. The capacitance decreases with the increase of the drain-source voltage, especially the output capacitance and the reverse transfer capacitance. Qgs, Qgd, and Qg: Gate Charge The gate charge value reflects the charge stored on the capacitor between the terminals. Since the charge on the capacitor changes with the voltage at the moment of switching, the influence of gate charge must often be considered when designing the gate drive circuit. Qgs is the charge from 0 to the first inflection point, Qgd is the charge from the first inflection point to the second inflection point (also called Miller charge), and Qg is the charge from 0 to a specific drive voltage at VGS. 79)]Drain current and drain-source voltage have little effect on gate charge, and gate charge does not change with temperature. Test conditions are specified. The gate charge curve is shown in the data sheet, including the gate charge change curve corresponding to the fixed drain current and the variable drain-source voltage. In the figure, the platform voltage VGS(pl) increases slightly with increasing current (and decreases with decreasing current). The platform voltage is also proportional to the threshold voltage, so different threshold voltages will produce different platform voltages.
The following figure is more detailed and can be applied:
[color=rgb(79, 79, td(on) ： Turn-On Delay Time The turn-on delay time is the time from when the gate-source voltage rises to 10% of the gate drive voltage until the drain current rises to 10% of the specified current. td(off) ： Turn-Off Delay Time The turn-off delay time is the time from when the gate-source voltage drops to 90% of the gate drive voltage until the drain current drops to 90% of the specified current. This shows the delay before the current is delivered to the load. tr : Rise time Rise time is the time it takes for the drain current to rise from 10% to 90%. tf : Fall time Fall time is the time it takes for the drain current to fall from 90% to 10%.79)]When the source is grounded, the capacitance measured between the drain and the gate is the reverse transfer capacitance. The reverse transfer capacitance is equivalent to the gate-to-drain capacitance. Cres = Cgd. The reverse transfer capacitance is also often called the Miller capacitance. It is an important parameter for the rise and fall times of the switch. It also affects the turn-off delay time. The capacitance decreases with the increase of the drain-source voltage, especially the output capacitance and the reverse transfer capacitance.
Qgs, Qgd, and Qg: Gate charge
The gate charge value reflects the charge stored on the capacitor between the terminals. Since the charge on the capacitor changes with the voltage at the moment of switching, the influence of gate charge must often be considered when designing the gate drive circuit.
Qgs is from 0 charge to the first inflection point, Qgd is from the first inflection point to the second inflection point (also called "Miller" charge), and Qg is from 0 point to the part where VGS equals a specific drive voltage.
79)]Drain current and drain-source voltage have little effect on gate charge, and gate charge does not change with temperature. Test conditions are specified. The gate charge curve is shown in the data sheet, including the gate charge change curve corresponding to the fixed drain current and the variable drain-source voltage. In the figure, the platform voltage VGS(pl) increases slightly with increasing current (and decreases with decreasing current). The platform voltage is also proportional to the threshold voltage, so different threshold voltages will produce different platform voltages.
The following figure is more detailed and can be applied:
[color=rgb(79, 79, td(on) ： Turn-On Delay Time The turn-on delay time is the time from when the gate-source voltage rises to 10% of the gate drive voltage until the drain current rises to 10% of the specified current. td(off) ： Turn-Off Delay Time The turn-off delay time is the time from when the gate-source voltage drops to 90% of the gate drive voltage until the drain current drops to 90% of the specified current. This shows the delay before the current is delivered to the load. tr : Rise time Rise time is the time it takes for the drain current to rise from 10% to 90%. tf : Fall time Fall time is the time it takes for the drain current to fall from 90% to 10%.79)]When the source is grounded, the capacitance measured between the drain and the gate is the reverse transfer capacitance. The reverse transfer capacitance is equivalent to the gate-to-drain capacitance. Cres = Cgd. The reverse transfer capacitance is also often called the Miller capacitance. It is an important parameter for the rise and fall times of the switch. It also affects the turn-off delay time. The capacitance decreases with the increase of the drain-source voltage, especially the output capacitance and the reverse transfer capacitance.
Qgs, Qgd, and Qg: Gate charge
The gate charge value reflects the charge stored on the capacitor between the terminals. Since the charge on the capacitor changes with the voltage at the moment of switching, the influence of gate charge must often be considered when designing the gate drive circuit.
Qgs is from 0 charge to the first inflection point, Qgd is from the first inflection point to the second inflection point (also called "Miller" charge), and Qg is from 0 point to the part where VGS equals a specific drive voltage.
79)]Drain current and drain-source voltage have little effect on gate charge, and gate charge does not change with temperature. Test conditions are specified. The gate charge curve is shown in the data sheet, including the gate charge change curve corresponding to the fixed drain current and the variable drain-source voltage. In the figure, the platform voltage VGS(pl) increases slightly with increasing current (and decreases with decreasing current). The platform voltage is also proportional to the threshold voltage, so different threshold voltages will produce different platform voltages.
The following figure is more detailed and can be applied:
[color=rgb(79, 79, td(on) ： Turn-On Delay Time The turn-on delay time is the time from when the gate-source voltage rises to 10% of the gate drive voltage until the drain current rises to 10% of the specified current. td(off) ： Turn-Off Delay Time The turn-off delay time is the time from when the gate-source voltage drops to 90% of the gate drive voltage until the drain current drops to 90% of the specified current. This shows the delay before the current is delivered to the load. tr : Rise time Rise time is the time it takes for the drain current to rise from 10% to 90%. tf : Fall time Fall time is the time it takes for the drain current to fall from 90% to 10%.79)]
td(on) ：on delay time
The on delay time is the time from when the gate-source voltage rises to 10% of the gate drive voltage to when the drain current rises to 10% of the specified current.
td(off) ：off delay time
79)]The turn-off delay time is the time from when the gate-source voltage drops to 90% of the gate drive voltage to when the drain current drops to 90% of the specified current. This shows the delay before the current is transferred to the load.
tr : Rise Time
Rise Time is the time it takes for the drain current to rise from 10% to 90%.
tf : Fall Time
Fall time is the time it takes for the drain current to drop from 90% to 10%
79)]
td(on) ：on delay time
The on delay time is the time from when the gate-source voltage rises to 10% of the gate drive voltage to when the drain current rises to 10% of the specified current.
td(off) ：off delay time
79)]The turn-off delay time is the time from when the gate-source voltage drops to 90% of the gate drive voltage to when the drain current drops to 90% of the specified current. This shows the delay before the current is transferred to the load.
tr : Rise Time
Rise Time is the time it takes for the drain current to rise from 10% to 90%.
tf : Fall Time
Fall time is the time it takes for the drain current to drop from 90% to 10%
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