EMC signal integrity test 1---get out of the metaphysics
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EMC signal integrity test 1---get out of the metaphysics
Whether we enter the industry of electronic engineers from 51 single-chip microcomputers, STM32 circuits, op amps, sensors, ADC acquisition or thyristor and other power circuits, we usually spend a long time in the low-frequency electronic circuit design and debugging stage, usually dealing with signal paths of hundreds of Hz or several kHz. Occasionally, there will be communications such as RS232, RS485, IIC, SPI or CAN bus that make our PCB experience signals of hundreds of kHz. These actually cover most electronic application scenarios. At this stage, we pay more attention to the realization of circuit functions, and do not and do not need to consider signal integrity or EMC issues.
One day we will find that we have encountered some bottlenecks in new projects. Sometimes communication errors will occur inexplicably, some PCB boards will have large interference inexplicably, and boards with M-level signals will no longer be stable and reliable according to the previous wiring habits. At this time, EMC and signal integrity issues that hinder the advancement of electronic engineers are in front of us. If you encounter similar problems, then congratulations, it means that you have reached another new level.
EMC and signal integrity are another discipline independent of the functional design of electronic circuits. We can find a lot of information in this area, most of which will tell us theoretical knowledge and empirical rules. For example, in the case of high-speed signals, capacitors and resistors are no longer simply considered capacitors and resistors, and even the vias on the path will have an impact. PCB wiring is no longer just about routing, but also needs to consider the path of signal flow; the spacing between wiring and whether there is ground underneath, and even the key signal wiring length needs to be considered, etc. These are basic skills that RF engineers need to master, and for the majority of electronic engineers in other fields, these are advanced knowledge between masters and ordinary players.
For most engineers, some empirical rules of EMC and signal integrity are almost metaphysical. We know that we should follow these rules, but we don’t know intuitively how much difference there is between doing this and not doing it, and we don’t have an intuitive feeling. Because these rules are summarized by very expensive professional equipment and in experiments at no cost, we ordinary electronic engineers have no chance to experience and absorb them through experiments. We can only passively accept such theoretical guidance, and we have no experience like other electronic circuit knowledge.
We use the LOTO virtual oscilloscope and its EMC test module to conduct intuitive and practical tests on some important EMC and signal integrity rules of thumb, so that everyone can intuitively see the effects of these rules, break the metaphysics and deepen understanding.
The first rule we follow is: the smaller the loop area formed by the driving path for signal transmission and the return path formed by the return to the ground, the better. The larger the loop area, the more serious the noise coupling and EMI electromagnetic interference caused.
As shown in the following figure:
In order to implement the actual test, we simply made an experimental board. The schematic diagram and PCB are shown below. Students in need can directly ask me for the source file:
The board is powered by USB or an external 5V power supply, with a power switch and 4 3.3V active op amps, 80M, 48M, 11M, and 3.68M. Of course, you can put the crystal oscillator of the frequency you want to observe. These crystal oscillators select a crystal oscillator frequency output through jumpers, starting from A, passing through area 2, to area 3, and then passing through area 4 and returning to area 5. The jumper on the right side of the PCB can select the load resistance of the crystal oscillator signal, and you can choose one from 1M to 200 ohms. In this way, we can intuitively see that a high-speed signal, the frequency of which is the crystal oscillator frequency selected by the jumper, drives a load resistor selected by the jumper on the PCB, forming a loop of A->C on the PCB silk screen. We can also connect a ground wire along the signal wiring below through the jumper on the two jumpers, so that the signal loop becomes A->B, which is much smaller than the original A->C. Let's take a look at the real thing:
We selected a 48M crystal oscillator, used a load of 100K, used the A->C loop, the LOTO virtual oscilloscope OSCH02, and the E01 module, and measured the EMC signal integrity of area 1. The scenario is as follows:
The EMI spectrum we measured in area 1 of the test board is shown below. We can see that there is a very large 48MHz electromagnetic radiation with an amplitude exceeding 0.15V:
We can take 48M as the center frequency and view the details:
We keep other things unchanged and change the ground loop of the signal to A->B through the ground jumper. Also in area 1 of the test board, the EMI spectrum is measured as shown below. It can be seen that the electromagnetic radiation of 48MHz is significantly reduced and the amplitude becomes 0.073V:
Similarly, we measured the 3.68M crystal oscillator and found a similar situation, as shown in the figure below. The rule is that the larger the loop area, the greater the EMI electromagnetic interference intensity. The difference is that there are many harmonic components in the spectrum of the 3.68M crystal oscillator. This is because the monitoring range of our window is 125M. Within this range, multiple harmonics of 3.68M can be displayed. The crystal oscillator itself is a signal that is close to a square wave, so there will be many harmonics. It’s just that the multiple harmonics of 48M measured before exceeded the window observation range and were not seen. High-order harmonics do not exist objectively. They are the mathematical expression of FFT. We should pay attention to this when observing the spectrum of EMC.
We can see intuitively that the same high-frequency signal has completely different EMI electromagnetic interference strengths when different paths on the PCB circuit board cause different loop areas. We not only verify the minimum loop area requirements of the signal integrity wiring guidelines, but also use the LOTO oscilloscope + E01 electromagnetic compatibility extension detection module to directly test the electromagnetic compatibility EMC issues of our existing circuit boards.
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