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How to use GPIO to simulate I2C to operate EEPROM [Copy link]

 The EEPROM datasheet has the following description: If you use GPIO to simulate I2C to operate the EEPROM, 1) How to distinguish whether it is Standard (100kHz) or Fast (400kHz)? 2) How to use the following time? For example, for standard mode, tHD:STA + tSU:STA is at least 8.7us (clock signal is high), and the clock cycle is 10us, the high level should be 5us, tHD:STA + tSU:STA has exceeded this time, how to explain it? In addition, since all the given values are Min, how to determine how long the delay is after the GPIO operation? tHD:STA START Condition Hold Time tSU:STA START Condition Setup Time tSU:STO STOP Condition Setup Time tBUF Bus Free Time Between STOP and START



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Both values are Max extreme values. The standard mode cannot exceed 100KHz, and the fast mode cannot exceed 400KHz. Obviously, if you use 300KHz, you can only use the fast mode. The lower limit does not matter. If it is lower than 100KHz, you can use the standard mode or the fast mode.  Details Published on 2019-4-3 16:26
 

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The minimum and maximum values cannot be exceeded. It can be slower, but there is no lower limit. Faster is not allowed, but there is an upper limit. Pay attention to the concepts of frequency and period. The highest frequency corresponds to the minimum period.
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When GPIO simulates a clock signal, must the high level and low level time be the same? For example, at 100kHz, the high level must be 5us?  Details Published on 2019-4-1 17:37
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chunyang posted on 2019-4-1 17:28 The minimum and maximum values cannot be exceeded. It can be slower, but there is no lower limit. Faster is not allowed, and there is an upper limit. Pay attention to the concepts of frequency and period. The highest frequency...
When GPIO simulates a clock signal, must the high and low levels have the same time? For example, at 100kHz, the high level must be 5us?
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Don't be so strict.  Details Published on 2019-4-2 17:54
Don't be so strict.  Details Published on 2019-4-1 20:52
 
 
 

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Posted by Magpie Prince on 2019-4-1 17:37 When GPIO simulates clock signal, must its high level and low level time be the same? For example, at 100kHz, the high level must be 5us?
It doesn't have to be so strict.
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Posted by Magpie Prince on 2019-4-1 17:37 When GPIO simulates clock signal, must the time of high level and low level be the same? For example, at 100kHz, the high level must be 5us?
It does not need to be precise, as long as it is not shorter than the limit and meets the timing.
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The specification gives parameters for two clock frequencies: 100k and 400k. However, if GPIO is used for simulation, the clock frequency may be 300k. How should the time parameters be selected at this time?  Details Published on 2019-4-3 14:22
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Feeling above the minimum is fine
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chunyang posted on 2019-4-2 17:54 It doesn't need to be precise, just not shorter than the limit and meet the timing.
The specification gives parameters for two clock frequencies, 100k and 400k, but if GPIO is used for simulation, the clock frequency may be 300k. How should the time parameters be selected at this time?
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Both values are Max values. Standard mode cannot exceed 100KHz, and fast mode cannot exceed 400KHz. Obviously, if you use 300KHz, you can only use fast mode. The lower limit does not matter. If it is lower than 100KHz, you can use standard mode or fast mode.  Details Published on 2019-4-3 16:26
 
 
 

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Posted by Magpie Prince on 2019-4-3 14:22 The specification gives the parameters of 100k and 400k clock frequencies, but if GPIO is used to simulate, it may be 300k clock frequency. At this time, those...
Both values are Max extreme values. The standard mode cannot exceed 100KHz, and the fast mode cannot exceed 400KHz. Obviously, if you use 300KHz, you can only use the fast mode. The lower limit does not matter. If it is lower than 100KHz, you can use the standard mode or the fast mode.
This post is from TI Technology Forum
Personal signature上传了一些书籍资料,也许有你想要的:http://download.eeworld.com.cn/user/chunyang
 
 
 

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