The OP
Published on 2019-3-27 14:03
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This post is from Analog electronics
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The solution is to connect a diode in reverse parallel with the emitter junction. After the diode is connected in parallel, the input signal changes from low level to high level, and the transistor emitter junction has current (capacitor charging current). When the input signal changes from high level to low level, the capacitor discharges through the diode. In this way, the capacitor will not be filled with the input signal, and the transistor can be turned on every time a high level comes.
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Published on 2019-3-29 09:36
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2
Published on 2019-3-27 14:32
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This post is from Analog electronics
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Teacher, I have built a simulation circuit here. According to the simulation waveform analysis, the PWM output is normal. When the high level is high, the base voltage is about 0.6V, and the collector output voltage is low. When the low level is low, the base voltage is -4.37V, and the collector outputs 12V high level. When the MCU continues to output high level, the base voltage is only close to 0V.
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Published on 2019-3-29 09:07
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3
Published on 2019-3-27 15:21
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This post is from Analog electronics
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This post is from Analog electronics
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5
Published on 2019-3-27 17:54
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This post is from Analog electronics
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Personal signature上传了一些书籍资料,也许有你想要的:http://download.eeworld.com.cn/user/chunyang
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6
Published on 2019-3-27 21:27
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This post is from Analog electronics
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Here I built a simulation circuit. According to the simulation waveform analysis, the PWM output is normal. When the PWM output is high, the base voltage is about 0.6V, and the collector output voltage is low. When the MCU outputs high level continuously, the base voltage is close to 0V, which is not very reasonable.
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Published on 2019-3-29 09:08
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This post is from Analog electronics
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I don't quite understand why one transistor is conducting and the other is not conducting when the voltage is high. This is the result of the base not being biased (or as mentioned on the 6th post, the base is DC-isolated). You simulated the capacitor with a large capacitance (10uF) and the initial condition of the capacitor is that the voltage across the two ends is zero (no charge is stored in the capacitor).
Details
Published on 2019-3-29 09:36
I don't quite understand why one transistor is conducting and the other is not conducting when the voltage is high. This is the result of the base not being biased (or as mentioned on the 6th post, the base is DC-isolated). You simulated the capacitor with a large capacitance (10uF) and the initial condition of the capacitor is that the voltage across the two ends is zero (no charge is stored in the capacitor).
Details
Published on 2019-3-29 09:33
I don't quite understand why one transistor is conducting and the other is not conducting when the voltage is high. This is the result of the base not being biased (or as mentioned on the 6th post, the base is DC-isolated). You simulated the capacitor with a large capacitance (10uF) and the initial condition of the capacitor is that the voltage across the two ends is zero (no charge is stored in the capacitor).
Details
Published on 2019-3-29 09:32
I don't quite understand why one transistor is conducting and the other is not conducting when the voltage is high. This is the result of the base not being biased (or as mentioned on the 6th post, the base is DC-isolated). You simulated the capacitor with a large capacitance (10uF) and the initial condition of the capacitor is that the voltage across the two ends is zero (no charge is stored in the capacitor).
Details
Published on 2019-3-29 09:30
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This post is from Analog electronics
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Published on 2019-3-29 09:30
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This post is from Analog electronics
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10
Published on 2019-3-29 09:32
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This post is from Analog electronics
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11
Published on 2019-3-29 09:33
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This post is from Analog electronics
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12
Published on 2019-3-29 09:36
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This post is from Analog electronics
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