2014-9-13 This week's progress is OK. The software framework has been built. The design is as follows: Use the concept of scheduler to design the system, establish 4 tasks, and arrange the execution o
Please help me, experts: Cry:, my question is this: How to connect FPGA to a module (RM04 module) with router mode and working in router mode through a network cable, that is, the FPGA needs to be ass
Serial port receiving: send AA (10101010) and receive D5 (11010101); send 55 (01010101) and receive D5?? Now sending is fine, only receiving is problematic. By the way, how to clear the contents of re
Third: Don't procrastinate on work. Many people like to choose the latter between study and play, and then rush to finish the things they need to review for the exam at the last minute. But p
As you may know, in the STM32 branch of MicroPython, the HAL library is always updated slowly, usually lagging behind ST official by several months. Today, it is finally updated again, and the updated