Design of 915 MHz RF card reader based on FPGA and C8051F020

Abstract: Based on the ISO/IEC 18000-6 Type B protocol, a radio frequency card reader with an operating frequency of 915 MHz is designed. FPGA is used to complete the digital signal processing specified in the protocol, and the C8051F020 microcontroller is used as the main controller. The Verilog HDL hardware description language is used to build a verification platform for each small module and system inside the FPGA. The EP1C6Q240C8 chip of the Cyclone series of Altera is selected as the target device. Quartus II is used for synthesis, and the timing and functional verification are passed. The experimental results show that the card reader meets the requirements of the ISO/IEC 18000-6 Type B protocol and has the advantages of flexible structure, small size, and easy upgrade.
Keywords: Radio frequency identification; card reader; FPGA; C8051F020

Radio frequency identification (RFID) technology is a contactless automatic identification technology that automatically identifies the target object and obtains relevant information through radio frequency signals. Generally, the RFID system mainly consists of three parts: application software, radio frequency card and card reader [1]. Compared with the low-frequency RFID system, the ultra-high frequency (UHF) RFID system operating at 860 MHz to 960 MHz has the advantages of long reading distance and fast reading speed, and is currently a hot spot in the development of RFID technology in the world [2]. The design of the card reader is a key part of the RFID system design, and there are many design schemes. FPGA [3] has the characteristics of simple development, static reprogrammable programming and dynamic online programming, and has become the most widely used programmable application-specific integrated circuit today. Currently, many companies that produce RFID products use their own standards. Several standards that can be used for radio frequency cards include ISO/IEC 11784, ISO/IEC 14443, ISO/IEC 15693 and ISO/IEC 18000. Among them, the most widely used standards are ISO/IEC 14443, ISO/IEC 15693 and ISO/IEC 18000 [4]. This paper designs a card reader with an operating frequency of 915 MHz based on the ISO/IEC 18000-6 Type B protocol.

1 Card reader hardware design
The card reader hardware can be divided into three modules: FPGA digital signal processing module, MCU and human-machine interface module and RF transceiver module. Its structure block diagram is shown in Figure 1. The FPGA digital signal processing module is used to implement the baseband data encoding and decoding specified in the ISO/IEC 18000-6 Type B protocol, the MCU and human-machine interface module are used to implement some operation interfaces such as command jump control and return data display, and the RF transceiver module is used to process the front-end ultra-high frequency signal.

1.1 FPGA Digital Signal Processing Module
The FPGA digital signal processing module includes a clock division module, FIFO, Manchester encoder, CRC generation check, FM0 decoder, serial-to-parallel conversion circuit and corresponding frame sending and receiving controller. Its structural block diagram is shown in Figure 2.

The internal working process of this module is as follows:
(1) Transmitting part
① The data communication interface 8-bit parallel receives command data from the MCU, and the data is buffered in the FIFO.
② The data is converted from parallel to serial.
③ Under the control of the transmitting controller, the serial data passes through the CRC module to generate a 16-bit CRC check value and append it to the back of the original data.
④ According to the ISO/IEC 18000-6 Type B protocol, the above data is Manchester encoded.
⑤ The Manchester-encoded data is directed to a shift register with a preset frame header. Once the data arrives, the shift register is started, and then the output data is transmitted to the RF transceiver module.
(2) Receiving part
① Receive a frame of baseband signal from the RF transceiver module and use the shift register to detect the frame header. If the frame header is detected, a signal of receiving the frame header is sent to the receiving controller.
② If the receiving controller receives the signal of the frame header, it immediately starts FM0 decoding.
③ The decoded data is transmitted to the serial/parallel conversion circuit, and the converted data is temporarily stored in the FIFO.
④At the same time, the decoded data is also sent to the CRC module for verification. If the verification result is wrong, the data stored in the FIFO is cleared and the MCU is notified that the received data is wrong; if the verification result is correct, the data in the FIFO is transmitted to the MCU.

1.2 MCU and Human-Machine Interface Module
The MCU and Human-Machine Interface Module is based on the C8051F020 microcontroller [5] and consists of peripheral circuits such as FPGA interface, LCD, PS/2 keyboard, UART interface and JTAG interface. Its structural block diagram is shown in Figure 3.

The functions implemented by this module are as follows: (1) C8051F020 is responsible for the coordination of all parts of the entire card reader (including data communication with the computer); (2) at startup, it transmits configuration data to the FPGA to initialize the FPGA; (3) during the card reading process, it transmits the card reading command to the FPGA, and then starts receiving FPGA signals through the INT1 interrupt; (4) it processes the received RFID card information (card number, password, etc.); (5) it implements the binary tree anti-collision function; (6) it drives the LCD to display the system prompt information; (7) it expands a PS/2 keyboard to input data and commands; (8) it controls the TR1000 chip to set the OOK transmission mode or the ASK reception mode; (9) it controls the transmission power; (10) it expands the EEPROM to store the read RFID card information.

1.3 RF transceiver module
There are generally two solutions for the development of UHF band RF transceiver modules: one is to use discrete components to build RF circuits; the other is to use wireless RF transceiver modules to achieve baseband signal modulation and demodulation [6]. Since the circuit debugging of the first method is more troublesome and will take a long time to develop, this design adopts the second solution.
The ISO/IEC 18000-6 Type B protocol stipulates that the RF modulation method from the card reader to the RF card end is ASK modulation with a modulation depth of 99%, which can be approximately regarded as OOK modulation; while the RF modulation method from the RF card to the card reader end is backscatter modulation, which is similar to ASK modulation, so it can be demodulated in the ASK mode at the demodulation end. The core chip of the RF transceiver module uses the TR1000 chip of RFM. TR1000 is a single-chip OOK/ASK universal wireless RF transceiver chip suitable for short-distance wireless data communication and wireless control applications with high stability, small size, low power and low price.
2 Card reader software system design
The software design adopts modular and structured programming ideas. The microcontroller configures the FPGA during initialization. Considering the strong readability and good portability of C language and the actual situation of MCU, this design uses C language to program C8051F020. The card reader software system can be roughly divided into: card reading and writing operation program, anti-collision program and serial communication program.

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2.1 Card Reader and Writer Operation Program
The card reader and writer operation program completes the baseband signal encoding and decoding based on the ISO/IEC 18000-6 Type B protocol. Its program design flow chart is shown in Figure 4.
The specific working process is as follows: (1) Power-on reset, system initialization, including the initialization of the microcontroller clock, port, LCD, timer, configuration of FPGA and interruption. (2) Waiting to receive instructions sent by the host computer or keyboard. (3) Judge the instruction. If it is a multi-card operation, enter the anti-collision subroutine; if it is a single card operation, directly perform card reading, card writing, value operation and abort operation. (4) If the operation is successful, the obtained data is sent back to the host computer, and the LCD is driven to display the operation success information; if the operation fails, the LCD is driven to display the operation failure information.

2.2 Anti-collision Program
When the card reader performs multi-card operation on the RFID card, all RFID cards within the coverage of its antenna will be activated and in the identification state, resulting in multiple RFID card read and write conflicts. Therefore, conflict resolution is the key to multi-card operation. The ISO/IEC 18000-6 Type B protocol specifies the anti-collision mechanism in detail, and its program design flow chart is shown in Figure 5. The principle of the anti-collision mechanism is to use randomly generated 0 and 1 signals to implement binary tree search, and set a success command to further improve the search efficiency. It is a binary tree anti-collision algorithm [7]. The specific implementation process is as follows: First, the RFID card enters the working range of the card reader and enters the ready state from the off-site power-off state. The card reader can use the GroupSeleet command and the GroupUnseleet command to allow all or part of the RFID cards in the ready state within the working range of the card reader to participate in the anti-collision process. For the anti-collision mechanism of this mode, the RFID card should have the following two hardware circuits: an 8-bit counter and a 0, 1 random number generator. When the RFID card enters the identification state (ID state), its internal counter is cleared to 0. Some of them can return to the ready state by receiving the GroupUnselect command, and other RFID cards in the identification state enter the anti-collision execution process. The selected RFID card starts the following cycle: (1) All RFID cards in the identification state and with an internal counter of 0 will send their identification codes; (2) If more than one RFID card sends an identification code, the card reader will detect a conflict and send a Fail command; (3) All RFID cards that receive the Fail command and whose internal counter is not equal to 0 will add 1 to their own counter; All RFID cards that receive the Fail command and whose internal counter is equal to 0 (i.e., the RFID card that has just sent a response) will generate a random number of 1 or 0. If 1 is selected, the RFID card will add 1 to its own counter; if 0 is selected, the RFID card will keep the counter at 0 and send its identification code again. There are four possible situations in the following process; (4) Situation 1: If more than one RFID card sends, step (2) will be repeated; (5) Situation 2: If all RFID cards randomly select 1, the card reader will not receive a response. At this time, the card reader will send a Success command, and the counters of all RFID cards will be reduced by 1. Then the RFID cards with counters equal to 0 will start to send, and then step (2) will be repeated; (6) If only one RFID card sends and its identification code is correctly received by the card reader, the card reader will send a DataRead command containing the identification code. After the RFID card correctly receives the command, it will enter the data exchange state and start sending its data. After that, the card reader will send a Success command to reduce the counter of the RFID card in the identification state by 1; (7) Case 3: If only one RFID card has a counter equal to 0 and returns a response, repeat step (5) and the card reader sends a Success command or repeats step (6) to send a DataRead command; if more than one RFID card returns a response, repeat step (2); (8) Case 4: If only one RFID card returns a response and its identification code is not received correctly, the card reader will send a Resend command. If the identification code is received correctly, repeat step (5). If the identification code is received several times (this number can be set based on the error handling standard desired by the system), it is assumed that more than one RFID card is responding and repeat step (2).

After the above anti-collision process, the RF cards in the RF field can be identified one by one and exchange data.

2.3 Serial communication program
The system uses a PC as the host computer and a card reader as the slave computer. The communication between the host computer and the slave computer adopts serial communication based on RS-232-C. RS-232-C is a serial communication bus standard, which is the interface standard between data terminal equipment (DTE) and data communication equipment (DCE). As long as the equipment produced by different manufacturers has an RS-232-C standard interface, they can be plugged into each other without any conversion circuit. The
serial communication program is the control program for the communication between the MCU and the PC. The sending program is designed in a query mode, that is, the data to be sent is first sent to the buffer, and then the serial port sending interrupt flag is queried to see if it is available. If it is available, the next data is sent.
The receiving program is designed in an interrupt mode, that is, when the PC wants to send data to the MCU, it actively requests an interrupt from the MCU. If the receiving interrupt flag is valid, the PC transmits data to the MCU.

3 Verification Scheme
3.1 Establishment of Verification Platform
In order to verify whether the designed card reader can complete the expected functions, a corresponding verification platform was designed [8]. The verification platform consists of three parts: data decoding channel, data encoding channel and instruction analyzer. The data decoding channel decodes the data frame sent by the card reader and extracts the original data of the instruction; the instruction analyzer judges the received instruction data, returns the corresponding data and sends it to the data encoding channel; the data encoding channel encodes the sent data and then sends it to the card reader.
The platform is built using Verilog HDL hardware language, and the EP1C6Q240C8 chip of Altera's Cyclone series is selected as the target device. Quartus II is used for comprehensive verification. Its structural block diagram and circuit schematic diagram are shown in Figure 6 and Figure 7 respectively.

3.2 Test Result Analysis
(1) Timing Analysis
By running the timing analyzer built into QuartusII 7.1, we can get some parameters for timing analysis: tsu (input setup time), tco (clock to output delay), and th (hold time) are 3.530 ns, 13.174 ns, and 0.751 ns, respectively. The maximum base frequency clock clk can reach 89.06 MHz, while the base frequency clock specified in the ISO/IEC 18000-6 Type B protocol is 40 kHz. The timing results of this system are analyzed and show that it fully meets the protocol requirements. The specific timing analysis results are shown in Figure 8.

(2) Functional analysis
Take the GROUP_SELECT_LT command as an example for functional analysis. The GROUP_SELECT_LT command is a group selection command in multi-card operation. When the RFID card receives this command, the data at the specified address in the card is compared with the data provided in the frame. If the data in the card is smaller, the 64-bit serial number of the RFID card is returned, otherwise no response is made. The command number of the GROUP_SELECT_LT command is 03, the address is set to 0F, the mask is set to FF, and the 64-bit data is all set to F, so the command data transmitted from the MCU to the FPGA is 03_0F_FF_FFFF_FFFF_FFFF_FFFF. After the original data is processed by the FPGA digital signal processing module, it becomes a frame of baseband data signal. The verification platform decodes the data frame sent by the card reader, then judges the instruction and returns the 64-bit serial number of the RFID card, which is encoded into a frame of data frame and sent to the card reader. After receiving this frame, the card reader decodes it and performs CRC check. If there are no errors, the decoded data is transmitted to the MCU.
The simulation waveform of the GROUP_SELECT_LT command is shown in Figure 9. The experiment proves that the ISO/IEC 18000-6 Type B protocol can be implemented.
With the establishment of RFID-related international standards (such as ISO/IEC 18000), the research and development of RFID has become an international topic. Among the many RFID working frequency bands, the RFID technology in the UHF band has the most promising prospects and has become a hot spot in the current research field of RFID technology.