Comparison between DSP and ordinary MCU

Consider an example of digital signal processing, such as a finite impulse response filter (FIR). In mathematical terms, a FIR filter is a series of dot products. It takes an input quantity and an ordinal vector, multiplies the coefficients and the sliding window of input samples, and then adds all the products together to form an output sample.

Similar operations are repeated in large quantities during digital signal processing, so devices designed for this purpose must provide special support, which has led to the separation of DSP devices and general-purpose processors (GPPs):

1 Support for dense multiplication operations

GPPs are not designed to do dense multiplication tasks, and even some modern GPPs require multiple instruction cycles to do a multiplication. DSP processors use specialized hardware to implement single-cycle multiplication. DSP processors also add accumulator registers to handle the sum of multiple products. Accumulator registers are usually wider than other registers, adding extra bits called result bits to avoid overflow. At the same time, in order to fully realize the benefits of specialized multiplication-accumulation hardware, almost all DSP instruction sets include explicit MAC instructions.

2 Memory Structure

Traditionally, GPP uses the von Neumann memory structure. In this structure, there is only one memory space connected to the processor core through a set of buses (an address bus and a data bus). Usually, four memory accesses will occur to perform a multiplication, which takes at least four instruction cycles.

Most DSPs use the Harvard structure, which divides the memory space into two, storing programs and data respectively. They have two sets of buses connected to the processor core, allowing them to be accessed simultaneously. This arrangement doubles the bandwidth of the processor memory, and more importantly, provides data and instructions to the processor core at the same time. Under this layout, the DSP can implement single-cycle MAC instructions.

There is also the problem that today's typical high-performance GPP actually contains two on-chip caches, one for data and one for instructions, which are directly connected to the processor core to speed up access at runtime. Physically, this dual memory and bus structure on chip is almost the same as the Harvard structure. However, logically, there are important differences between the two.

GPP uses control logic to determine which data and instruction words are stored in the on-chip cache, without the programmer's knowledge (and perhaps without the programmer's knowledge). In contrast, DSP uses multiple on-chip memories and multiple sets of buses to ensure multiple memory accesses per instruction cycle. When using DSP, the programmer explicitly controls which data and instructions are stored in on-chip memory. When writing programs, the programmer must ensure that the processor can effectively use its dual buses.

In addition, DSP processors almost never have data caches. This is because typical data for DSP is a data stream. That is, after the DSP processor performs calculations on each data sample, it is discarded and rarely reused.

3 Zero-overhead loops

If you understand a common characteristic of DSP algorithms, that is, most of the processing time is spent executing small loops, it is easy to understand why most DSPs have dedicated hardware for zero-overhead loops. The so-called zero-overhead loop means that the processor does not spend time checking the value of the loop counter, conditionally transferring to the top of the loop, and decrementing the loop counter by 1 when executing the loop.

In contrast, GPP loops are implemented in software. Some high-performance GPPs use branch prediction hardware to achieve nearly the same effect as hardware-supported zero-overhead loops.

4 Fixed-point calculation

Most DSPs use fixed-point calculations instead of floating-point. Although DSP applications must pay great attention to digital accuracy, it should be much easier to do it with floating-point, but for DSP, cheapness is also very important. Fixed-point machines are cheaper (and faster) than corresponding floating-point machines. In order to avoid using floating-point machines while ensuring digital accuracy, DSP processors support saturation calculations, rounding, and shifting in both instruction sets and hardware.