A method to realize DSP online debugging using microcontroller

　　Normally, when developing and debugging DSP systems, an SRAM chip must be equipped as an off-chip program RAM. When debugging, use the corresponding simulation board to download the program into SRAM, so that the DSP system implements the corresponding operation by running the program code in SRAM. It can be seen that when debugging the DSP system, the key is to download the program into the SRAM. Therefore, if the program code can be written into the SRAM through the microcontroller, the debugging of the DSP system can also be completed. The following describes in detail how to use the microcontroller AT89S5l to debug the DSP chip TMS320LF2407 online without using a simulation board.

1 Hardware design
1.1 Implementation process of online debugging of TMS320LF2407
　　To complete the debugging of the DSP system, the source code of the program must first be written into the off-chip SRAM. At this time, the microcontroller and SRAM form a system, and the microcontroller can write the separated DSP program code into the SRAM. After completing this operation, cut off the connection between the microcontroller and SRAM, so that DSP and SRAM form an independent system, and configure LF2407 in microprocessing mode, that is, set the MP/MC pin to high level. In this way, the DSP system starts to work, and the LF2407 starts executing the program code from the 0000H unit of the external SRAM. When modifying the DSP program, you only need to modify the corresponding code area in the microcontroller and then rewrite it into the SRAM. The ISP function of the microcontroller can complete this process very conveniently and realize online debugging of the DSP system.
1.2 Hardware Implementation
　　AT89S5l is selected as the microcontroller. This chip has in-system programming function and can easily modify and download programs through the parallel port download line. The off-chip program RAM of TMS320LF2407 uses the 64K × 16-bit SRAM chip CY7C102lV. The BHE and BLE pins of the chip are used to enable the upper 8 bits and lower 8 bits of the SRAM respectively. The hardware block diagram is shown in Figure l.

　　Since 89S51 is powered by 5V and CY7C102lV is powered by 3.3V, the 5V and 3.3V levels need to be converted. In Figure 1, the address line and control line on the microcontroller side convert 5V electronics to 3.3V level through 74LVCl6245 and 74LVC245 respectively. It is recommended to use 74LVC245 for level conversion of the data line. This chip is powered by 5V and 3.3V dual power supplies. It can convert the 5V and 3.3V levels on the data line to each other, allowing the microcontroller to read and write data in RAM. The read data can be sent to the computer through the serial port, so that the code written into the SRAM can be verified to be correct. 89S5l is an 8-bit microcontroller, while the CY7Cl02lV and DSP data bits are both 16 bits, so the code needs to be written in two steps, first writing the lower 8 bits, and then writing the upper 8 bits. An 8-bit DIP switch can be added between the upper 8-bit data line and the lower 8-bit data line. When writing data to the SRAM, the switch is closed, and when the DSP is to be run, the DIP switch must be turned off. When the code is correctly written into the SRAM, jump the MP/MC pin of the DSP to high level and select the MP mode to run the off-chip program. After the RAM is reset, the DSP can be run. Be sure to pay attention to the following situations in the design: Since the data lines and address lines of the two systems of MCU-SRAM and DSP-SRAM are shared, when one system is running, the data lines and address lines cannot be affected by the interference caused by the other chip. Otherwise, the system will not function properly. Therefore, attention must be paid to controlling the chip select signals of each chip to ensure that the address lines and data lines do not affect each other when the two systems are running separately.

2 Software design
　　*.generated after compilation by CC'C2000 of TI Company. The out file is a common object file format (coft), which is a structural file format, and the burning program of the microcontroller must be in the bex file format, so *. The out file is converted into hex file format before it can be burned into the microcontroller. The conversion steps are as follows.
　　① Generate *．A common object file (coff) in the form of out. When developing programs under TI's integrated development environment CC'C2000, they will be compiled and linked, and finally *. out file.
　　②Yes. out file is extracted, and the code and address information useful for the final load are filtered out.
　　The * generated in the first step. Since the out file is a file in coff format, its relocatability feature allows users to flexibly arrange the program within the allowed address range. Therefore,*. The out file is not a complete executable code. It contains some auxiliary information about each segment in the program, such as the starting address and segment length. If this information and the program code are loaded into the DSP, the program will not executed normally. At this time, *.out must be extracted and separated from auxiliary information and executable code. This task must be completed by a specialized program. The program provided by TI is used here. The name of the program is: coff_both. exe. It can be downloaded for free on TI's website.
　　Use this program to *. out file is operated, and finally the required *.out.c file is generated. The specific operation is to put the Coff_both.exe and exam-pie.out files in the same directory, type: Coff_both-out example.out at the DOS command prompt, and a file in the example.out.c format will be generated. The format of this document is shown below.
　　sectlon=,vectors
　　src_addr=0x0
　　length=0x6(6)
　　dest_addr_0x0
　　space=0
　　0x7980,Ox0150,0x7980，0xol50,
　　0x7980,0x0150,
　　checksum=0x78D0
　　seCtlon=．text
　　src_addr=0x0
　　length=0xl3(19)
　　dest_addr=0x150
　　space=0
　　0xBE4l, 0xBE46, 0xBE42, 0xBE44,
　　0xBCEO, 0xAE18, 0x83FE, 0xAE29,
　　Ox00E8, oxBCE1, 0xAEl0, 0x0000,
　　0xAE1A, 0xFFAA, 0x8B 00, 0x8B00,
　　0x8B00, 0x7980,0x015E.
　　Checksum=0xF59
　　You can see that this program has two programs. vect and. text, the starting addresses are 0000h and 0150h respectively, consisting of 6-word and 19-word codes respectively. These hexadecimal codes are the LF2407 program codes that are finally executed, and are also the codes that the microcontroller needs to write into the SRAM.
　　The *.out.c file generated in the second step clearly tells the program how many segments there are, the size of each segment, the starting address of the segment, and the hexadecimal code of each segment. With this file, you know what to write to the SRAM before you can start executing the LF2407 program. The next thing to do is to write the application program of the microcontroller to write the hexadecimal code in the *.out.c file into the SRAM. The program block diagram is shown in Figure 2.

3 Conclusion
　　The program loading of LF2407 through the microcontroller is a kind of RAM-based online programming. It does not need to program the program memory and is a kind of soft configuration. The ISP function of the microcontroller AT89S5l can be used to modify and program the program, making the system have the characteristics of online development.