Design of Network Camera Based on TMS320DM642

With the widespread application of network technology and multimedia technology, digital network video has developed rapidly. In the field of network video conferencing and network monitoring, converting traditional analog video signals into digital video signals and transmitting them with the help of existing IP networks has become a hot topic today.

In terms of technical implementation, network cameras are usually used. There are generally two types of network cameras on the market: one is composed of ordinary cameras plus video gateways, but this solution is bulky and cumbersome to operate; the other is to integrate all network access functions into the camera, which is small in size, full in function, easy to use and maintain. There are many solutions for the latter type of camera. This paper proposes a design based on embedded DSP and gives specific hardware and software implementation.

1 Hardware System Design

1.1 Embedded Processor TMS320DM642

TMS320DM642 (hereinafter referred to as DM462) is a new generation multimedia processor recently released by TI. It is based on its second-generation high-performance VelociTI VLIW structure and is suitable for a variety of digital media applications. The clock frequency of DM642 is 600MHz and the instruction speed is up to 4800MIPS. The two major features of this DSP are: first, it has three configurable video interfaces (VP) and can collect three video signals at the same time; second, it integrates an Ethernet interface, 10/100Mbps mode adaptation, can work in full-duplex or half-duplex mode, and has hardware flow control and service quality assurance (QoS) support. DM642 is very powerful and is one of the best platforms for multimedia communication systems.

1.2 Overall hardware architecture

The hardware platform of this system consists of six parts, namely video acquisition, data storage, video processing, video display, network and power management. Its structural block diagram is shown in Figure 1.

The video acquisition part uses an analog PAL camera and a high-precision video A/D converter to obtain digital images. The A/D converter uses TI's TVP5145 chip, which has a sampling accuracy of 10 bits and supports CCIR-656 and BT656 formats.

The RAM of the data storage part adopts Samsung's SDRAM. To match the 64-bit EMIF (external memory interface) of DM642, four SDRAMs are used, each working in 16-bit mode, with a single chip capacity of 32MB. The ROM of the data storage part adopts ATMEL's NOR-type Flash chip, with a total capacity of 256KB and an 8-bit data bus. The SDRAM in this system is used to store the system runtime code and temporary image data, and the Flash is used to store the system self-startup code and system program code.

The video display part uses a digital LCD, which can save the digital/analog conversion chip and only requires a CPLD to drive the LCD. The CPLD uses Altera's MAX3000 series. This part is an auxiliary function and can be selected according to the actual application occasion.

The Ethernet controller (i.e. EMAC) of DM642 belongs to the data link layer, so an external physical layer chip is required for network communication. Here, Intel's LXT971A chip is used, which provides an MII (Media Independent Interface) interface, which can be easily connected to DM642.

The power management part plays a decisive role in the design of a hardware system. The power module of this system adopts the solution of MAXIM, including a MAX1762 chip (generating 1.4V power to power the I/O of DM642 and 5V power to power the inverter of LCD).

2 Device Driver Design

TI has developed a two-layer device driver model for the VP port of DM642. The upper layer driver is called Class Driver, which is closer to the underlying hardware. When applying, you only need to write the driver according to this model.

For the Ethernet port, TI provides a network development kit (NDK) that provides a platform for developing network applications on DSP. With this platform, when developing network applications, you don't have to worry too much about how to enclose data into IP packets, nor do you have to pay too much attention to the internal working mechanism of the TCP/IP protocol, which can shorten the product development cycle and time to market.

1.2 Two-layer device driver model for video ports

The two-layer device driver model is shown in Figure 2. The top layer is the application program, and the bottom layer is the underlying hardware, including the VP port of DM642 and the video A/D chip. The part enclosed in curly brackets in the middle is the device driver. There is also a chip support library (CSL) in the figure, which provides a C language interface for configuring and controlling on-chip peripherals.

According to the characteristics of the VP port, each layer of the two-layer driver model of the device driver is further subdivided into two layers. As can be seen from Figure 2, the Class Driver is divided into FVID Class Driver and GIO Class Driver. The former is closer to the application and provides some API functions that are particularly suitable for images; the latter provides API functions for communicating with the Mini Driver. The Mini Driver is divided into a general part and a special part. The advantage of this division is that when the hardware composition is changed, there is no need to rewrite the Mini Driver, only the special part needs to be modified, which improves the reusability of the code.

2.2 Network Development Components

The core of the network development component is a series of TCP/IP protocol stack libraries. They include: (1) stack library and network tool library, which contain some optimized and compiled protocol stack codes; (2) operating system adaptation library, which is used to coordinate the interface between TCP/IP protocol stack and DSP/BIOS; (3) network control and scheduling library, which determines the initialization of TCP/IP environment and how network-related events are scheduled; (4) various hardware abstraction layer platform libraries, which provide support for various development boards of TI (such as DSK, TEB and EVM, etc.). Since this system is developed by ourselves, HAL is not involved.

The flow chart of the protocol stack library is shown in Figure 3, where the gray modules represent the five libraries in the previous operation.

3 Software Design and Implementation

TI's DSP development software includes an integrated development environment (CCS), a real-time operating system (DSP/BIOS), and a third-party algorithm library standard (eXpressDSP). DSP/BIOS is a user-customizable real-time operating system that includes functions such as memory management, thread management, interrupts, peripheral management, and task scheduling. In addition, the JPEG standard must be used for image compression, because when using JPEG for network transmission, if there is a short network congestion, the current frame can be discarded without affecting the image of the next frame, so the real-time requirements of the system can be guaranteed. In this system, the JPEG algorithm library provided by TI is called to complete JPEG compression.

3.1 Software Process Structure

According to the requirements of this system, the entire software system is divided into five task modules, each of which completes the function of steady and self-scaling. These five task modules are input task, processing task, output task, network task and control task, and their process is shown in Figure 4. The following describes the scheduling between tasks and the functions they complete respectively.

(1) Input task

This task module is mainly used to store the digital image collected by the VP port into the dynamically allocated memory space. The image format is YUV4:2:2 (can be set as needed) and the resolution is 720×480. Then the image chrominance signal is resampled to 4:2:0. The purpose of this is to call the JPEG algorithm library. After completing the above two steps, the input task module sends a message to the processing task module to inform the image of the location in the memory space, so that the processing task module can do further processing. Then, the input task module waits for the processing task module to reply, and after receiving the reply message, it continues to collect the next frame of image.

(2) Task processing module

This task module mainly completes JPEG compression. The processing task module first obtains a message sent from the input task module and obtains the image data from it. Then it performs JPEG compression. As mentioned above, the compression calls the JPEG algorithm library, and its compression speed and performance are relatively good. After the processing task module completes the image compression, it sends three messages: the first one is sent to the input task module, so that it can continue to collect the next frame of image; the second one is sent to the network task module, telling the network task module the location and number of bytes of the JPEG image in the memory for processing, and at the same time, the processing task module will wait for the network task module to reply to the message; the last message is sent to the output task module, informing the location of the original image in the memory, so that the output task module can output it to the LCD for display. Similarly, it will also wait for the output task module to reply to the message.

(3) Output task module

This task module completes the output of the collected original image to LCD for display. Since the collected image is YUV, and the LCD of this system uses RGB signal as input, it needs to be converted into digital image format, which is completed by CPLD.

(4) Network Task Module

This task module completes the network transmission function. It is implemented in three parts: the first part first obtains a message sent from the processing module, from which the size of the JPEG image and the location in the memory are obtained, and sends it to the client through the Socket socket of the UDP protocol. At the same time, a message is sent to the processing task module to inform that the JPEG image has been obtained and the next frame of the image can be compressed. The second part initializes the protocol stack, including the setting of IP address, subnet mask and gateway. If you want to connect to the Internet, you must set DHCP to dynamically assign IP addresses. In addition, you must choose which network service to use. DM642 supports Telnet, HTTP, Data The third part is to load web pages. The web pages are written in HTML on the PC, and a Java Applet is embedded in the web pages to realize the interaction between the system and the client. The HTML file cannot be directly loaded to DM642. It must be converted into a data array described in C language using the binsrc plug-in in the DOS environment. When the user accesses the system through the IE browser, the HTTP server accesses the HTML web pages in the memory (that is, accesses the data array described in C language) through the embedded file system. The file system is a RAM-based file system and resides in OS.LIB. At the same time, the Java Applet is downloaded to the client along with the HTML file and interpreted and executed by the IE browser.

(5) Control task module

This task module completes the control of JPEG compression performance on the HTML web page. The user-defined parameters received in the web page are transmitted to the processing task module through the mailbox mechanism in DSP/BIOS, thereby modifying the JPEG compression parameters and changing the compression quality. Figure 5 shows the dialog box for receiving user-modified parameters, 1 represents the worst compression quality, and 100 represents the best compression quality.

The initialization of these tasks is implemented in the system's main() function. In addition, the initialization of the DM642 chip (including the initialization registers, the setting of the secondary cache (L2), etc.) is completed in the dm642init() function, which is defined in the user initialization function list of DSP/BIOS and will not be repeated here.

The design of the network camera based on TMS320DM642 proposed in this paper has been successfully implemented. By opening the IE browser on the client, you can see the real-time monitoring image. The image display is relatively smooth, and the image frame rate in the local area network can reach 30 frames/second. Moreover, multiple video signals can be collected at the same time to meet the connection requests of multiple customers. This system meets the requirements of network video conferencing and video surveillance in the current broadband environment, and its application prospects are very broad.