Design of wired cascade conference audio solution based on DSPG D7

In the last proposal, I introduced a 4MIC noise reduction conference audio solution based on DSPG D7, which was favored by many customers, and many customers also filed many projects. Thank you for your support. This time, I will introduce a cascade conference audio project. Customers who are interested can continue to read on.

Since most of the current speakers are single speakers, if the conference room is large, it is difficult to achieve the desired effect. Cascade speakers can be cascaded in wired and wireless ways.

In order to achieve the effect of synchronizing sound playback and sound pickup, we use the Daisy Chain technology that DSPG currently has for cascaded audio, with microsecond-level synchronization accuracy, to achieve a good effect of voice playback and sound pickup synchronization. Based on this technology, wireless and wired cascading methods can be supported. In order to take time accuracy into consideration, I will explain the wired cascading solution we built.

Let me explain to you the concept of Daisy Chain.

.Daisy Chain improves device range/room coverage and can be used in large conference rooms.

.Daisy Chain The device activates the MIC closest to the caller.

Daisy Chain devices working together will continue to support the feature set of each device - good dual talk performance, as well as echo cancellation, beamforming and noise cancellation.

.The Daisy Chain device that is closest to the network is the master device, and the others are slave devices.

.The main device is connected to the laptop/mobile device via USB or Bluetooth

.Master and slave devices connect via Bluetooth, USB, DECT or 3.5mm analog cable

When devices are connected using Bluetooth or USB, clock drift between devices is expected and managed by Rate Adaptation

.The interconnection between devices should ensure a fixed delay of the audio signal on the Daisy Chain connection.

Daisy Chain technology supports multiple ways of connection, including analog line connection, Bluetooth connection, USB data line connection and DECT connection, as shown in the solution block diagram. Based on my method, I mainly explain the way based on analog line connection, that is, to achieve the cascade effect through 4 sections of 3.5mm audio cable.

The main control MCU we built here is based on the QCC3024 Bluetooth chip of the Qualcomm platform. The DSPG uses the D7 IC, and the D7 EVB we drew ourselves is used for construction.

Here I will explain the general principle to you. The purpose of conference audio is mainly for telephone conferences or listening to music. The technical level of telephone conference is referred to as Voice Call Use Case, and the scene of listening to music is referred to as Music Use Case.

In the design of this project, we need to use which TDM port of D7? TDM0 is used to connect to the I2S input/output of MCU (QCC3024) as the reference signal and the signal transmitted to the MCU by the audio processed by D7 voice call use case. TDM1 is the audio output port, that is, the audio data transmitted to speack output (only output is needed here). TDM2 is the connection channel between the two speakers, which is used to transmit cascade data.

The following is the Voice Call Use Case usage scenario, as shown in the following block diagram, where the green arrow describes the workflow of the downlink call and the blue arrow describes the workflow of the uplink call.

Job Description of Downline Talk:

The mobile phone is connected to QCC3024 via Bluetooth (this is the master machine), and the downlink data is output from the I2S port of QCC3024 to the TDM0 port of the master. Then TDM0 is transmitted in two ways: one way is transmitted to the TDM1 port after passing through the AGC/EQU/DRC module of its own algorithm, and DTM1 is then output to the speack through the DAC.

The other path is directly transmitted to TDM2 and output to the slave machine through the DAC module.

The slave machine receives the sound from the master through the TDM2 port, and transmits it to the TDM1 port after passing through the AGC/EQU/DRC module of its own algorithm. DTM1 then outputs it to the speack through the DAC.

This achieves the effect of cascading and simultaneous output.

Job Description of Call Uplink:

The slave machine starts voiceCall, collects the data from the four MICs, and after passing through its own AEC/BF/VCP and other algorithms, integrates one channel of valid audio data and outputs it to the TDM2 port of the master machine through TDM2.

The Master machine starts VoiceCall, collects the data from the four MICs, and integrates a channel of valid audio data after passing through its own algorithms such as AEC/BF/VCP. Then, the data transmitted from the slave machine is combined with the MMC module for algorithm processing.

After the MMC processing is completed, the data is directly transmitted to the I2S port of QCC3024 through TDM0 for uplink data processing.

The following is the application scenario of Music Use Case, as shown in the following block diagram. The green arrow indicates the transmission process of left and right channels.

The transmission of Music Use Case is that the QCC3024 msater machine transmits the audio data to the TDM0 port through I2S output. TDM0 transmits the left channel data to TDM1 through its own bypass function, and then transmits it to the speack output through DAC.

The master machine transmits the right channel data to TDM2 through TDM0, and then outputs it to the TDM2 port of the slave machine through TDM2. The slave machine transmits it to TDM1 through its own bypass function, and then transmits it to the speack output through DAC.

Software implementation method:

Configure QCC3024 for I2S output, set the sampling rate to 48K, 32bit

Transplant the DSPG firmware to the QCC3024 platform, and set the interface to SPI interface.

Screenshot of recording test:

The data waveform captured by the logic analyzer:

MCU selection requirements:

The MCU must support I2S output, SPI transmission interface and fast transmission rate (10M/s). Here we choose Qualcomm QCC3024, which can fully meet the requirements. The most important thing is that it can get full technical support from the D7+QCC platform of WPG. I chose QCC3024 here. Customers can choose different MCU platforms according to their own needs. It only needs to meet the above requirements.

Technical requirements for D7 PCB layout:

1. According to DSPG's requirements, the D7 board layout must be a 4-layer board or above.

2. If the MIC is fixed on the PCB board, the upper and lower distances of the four MICs should be kept above 7CM.

► Scenario application diagram

► Product physical image

► Display board photos

► Solution Block Diagram

► PCB Layout

► Core technology advantages

The DBMD7 is based on three CEVA-X DSP processors. The chip is equipped with relevant interfaces for communicating with other devices in the system, such as application processors (APs), codecs, digital microphones and sensors.

DBMD7 provides the following combinations:

 Three high-performance, high-efficiency, low-power VLIW/SIMD digital signal processors

 Supports a rich set of interfaces

 Small size, suitable for mobile devices

Independent operation, simple interface with mobile AP

 Pre-processing algorithms for up to 8 microphones to improve voice trigger (VT), voice command (VC), and automatic speech recognition (ASR) performance.

▪ Transmit path: VT/VC, VC and audio buffering, ASR pre-processing: Acoustic Echo Cancellation (AEC), BF and Noise Reduction (NR)

Receive Path: Audio Processing Algorithms

 Pre-processing algorithm for using up to 8 microphones in voice calls

▪ Transmit path: AEC, NR, EQ, automatic gain control (AGC)

Receive path: NR, AGC, EQ, speaker processing

DSP Core

 DBMD7 includes three CEVA-X2 DSP processors:

▪ Dual programmable high frequency DSP processors running up to 700 MHz.

 A programmable low-power DSP processor, running up to 125MHz, for low-leakage VT, detection and activation.

 Each CEVA-X DSP processor provides:

▪ Program Tightly Coupled Memory (PTCM): 64 KB RAM

Program cache: 32 KB

▪ Data Tightly Coupled Memory (DTCM): 64KB RAM

Data cache: 64 KB

3 non-vectored interrupts, 1 vectored interrupt, 1 NMI

4MB AXI shared RAM

64KB ROM for LP processors only

► Solution Specifications

For the MUC of this solution, we use Qualcomm's QCC3024 Bluetooth chip, and the transmission interface with DSPG is through the SPI interface because SPI has a fast and stable transmission speed.

DBMD7 supports external host interface for boot and control at the following speeds:

SPI: up to 25 Mbps

 I2C: up to 3 Mbps

 UART: up to 6 Mbps

DBMD7 DSP Core

 DBMD7 includes three CEVA-X2 DSP processors:

▪ Dual programmable high frequency DSP processors running up to 700 MHz.

 A programmable low-power DSP processor, running up to 125MHz, for low-leakage VT, detection and activation.

 Each CEVA-X DSP processor provides:

▪ Program Tightly Coupled Memory (PTCM): 64 KB RAM

Program cache: 32 KB

▪ Data Tightly Coupled Memory (DTCM): 64KB RAM

Data cache: 64 KB

3 non-vectored interrupts, 1 vectored interrupt, 1 NMI

4MB AXI shared RAM

64KB ROM for LP processors only

Security Accelerator

Secure boot support for code security, authentication, and rollback protection provides the following services:

 AES 128 code decryption

 Code authentication and verification based on ECDSA

 Shah 2 (224256)

 OTP (Fuse) processing and use of hashed public key storage

QCC3024 Hardware Specifications:

 90-ball 5.5 x 5.5 x 1.0 mm 0.5 mm pitch VFBGA

 Bluetooth 5.1 specification, DSP maximum frequency 120MHz