The MAX6954 is a universal display driver that can control multiple discrete, 7-segment, 14-segment, or 16-segment LED displays through a serial port. This application note describes a typical application and configuration for driving an 8-bit monochrome, 16-segment LED display.
For more information about the MAX6954, refer to the MAX6954 data sheet.
The application notes "Quick Start: Driving 7-Segment LED Displays with the MAX6954" and "Quick Start: Driving 14-Segment LED Displays with the MAX6954" are similar to this article and describe how to configure the MAX6954 to drive 7-segment and 14-segment displays, respectively.
A common application for the MAX6954 is to drive 16-segment single-color LEDs with up to 8 digits. This application note instructs the user on how to connect the MAX6954 to a 16-segment display and how to configure its internal registers to control the display of 104 characters from a built-in font.
The MAX6954 uses a multiplexing technique that alternates the polarity of the driver ports to reduce the number of pins. This is different from the standard LED multiplexing connection method where the cathode and anode pins of the driver are used separately. This technique is discussed in the application note "Charlieplexing - Reduced Pin-Count LED Display Multiplexing". Table 1 shows the wiring diagram for the MAX6954 to drive a 16-segment display that is compatible with the MAX6954 multiplexing configuration and its built-in font of 104 characters. The letters in Table 1 correspond to the segment labels in Figure 2. Figure 1 is a schematic diagram of the circuit for driving an eight-digit 16-segment display with MAX6954.
Enlarged display
Figure 1. MAX6954 16-segment display application circuit
Figure 2. Segment identification of 16-segment display
Table 1. Connection table for eight-digit 16-segment display
DIGIT | O0 | O1 | O2 | O3 | O4 | O5 | O6 | O7 | O8 | O9 | O10 | O11 | O12 | O13 | O14 | O15 | Q16 | O17 | O18 |
0 | CCO | -- | a1 | a2 | b | c | d1 | d2 | and | f | g1 | g2 | h | i | j | k | l | m | dp |
1 | -- | CC1 | a1 | a2 | b | c | d1 | d2 | and | f | g1 | g2 | h | i | j | k | l | m | dp |
2 | a1 | a2 | CC2 | -- | b | c | d1 | d2 | and | f | g1 | g2 | h | i | j | k | l | m | dp |
3 | a1 | a2 | -- | CC3 | b | c | d1 | d2 | and | f | g1 | g2 | h | i | j | k | l | m | dp |
4 | a1 | a2 | b | c | CC4 | -- | d1 | d2 | and | f | g1 | g2 | h | i | j | k | l | m | dp |
5 | a1 | a2 | b | c | -- | CC5 | d1 | d2 | and | f | g1 | g2 | h | i | j | k | l | m | dp |
6 | a1 | a2 | b | c | d1 | d2 | CC6 | -- | and | f | g1 | g2 | h | i | j | k | l | m | dp |
7 | a1 | a2 | b | c | d1 | d2 | -- | CC7 | and | f | g1 | g2 | h | i | j | k | l | m | dp |
After completing the wiring of the MAX6954 and the 16-segment display, the display test mode can be used to check the correctness of the connection. The display test mode is not affected by the control and data registers. It lights up all segments of the display, but does not change any register contents. Write 0x01 to register 0x07 to start the display test mode. If there are unlit segments of the display in the test mode, it means that the connection is incorrect. Write 0x00 to register 0x07 to exit the display test mode.
After completing the connection check, you need to set the MAX6954 register values as required to drive the 16-segment display. Table 2 includes the initial power-up values of some important MAX6954 registers. When the MAX6954 is first powered on, it is in shutdown mode, each bit of the display is blanked, the 16-segment font is selected, and the number of scan bits is set to the maximum, that is, eight bits. The default values of the decode mode register (0x01) and the digital type register (0x0C) are suitable for 16-segment displays.
Figure 3. 16-segment display font
Table 2. Initial state of the registers after powering on the MAX6954
REGISTER | POWER-UP CONDITION |
ADDRESS
(HEX) |
REGISTER DATA | |||||||
D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | |||
Decode Mode | 16-segment font enabled | 0x01 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Global Intensity | 1/16 (minimum intensity) | 0x02 | X | X | X | X | 0 | 0 | 0 | 0 |
Scan Limit | Display eight 16-segment digits: 0, 1, 2, 3, 4, 5, 6, 7 | 0x03 | X | X | X | X | X | 1 | 1 | 1 |
Control Register | Shutdown enabled, blink disabled, blink speed is slow | 0x04 | 0 | 0 | X | X | 0 | 0 | 0 | 0 |
Display Test | Normal operation (display test disabled) | 0x07 | X | X | X | X | X | X | X | 0 |
Digit Type | Digits 0 through 7 are 16 segment digits | 0x0C | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Intensity10 | 1/16 (min on), digits 1 and 0 | 0x10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Intensity32 | 1/16 (min on), digits 3 and 2 | 0x11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Intensity54 | 1/16 (min on), digits 5 and 4 | 0x12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Intensity76 | 1/16 (min on), digits 7 and 6 | 0x13 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Digit 0 | Blank digit, both planes | 0x60 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
Digit 1 | Blank digit, both planes | 0x61 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
Digit 2 | Blank digit, both planes | 0x62 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
Digit 3 | Blank digit, both planes | 0x63 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
Digit 4 | Blank digit, both planes | 0x64 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
Digit 5 | Blank digit, both planes | 0x65 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
Digit 6 | Blank digit, both planes | 0x66 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
Digit 7 | Blank digit, both planes | 0x67 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
The configuration register (0x04) is used to set the entry and exit of shutdown mode, control the blinking function, globally clear each bit data, and select whether to control each bit brightness globally or individually. The configuration register contains 7 bits (see Table 3).
-
The S bit is used to select shutdown mode or normal operation mode (read/write).
-
The B bit is used to select the blink rate (read/write).
-
The E bit is used to globally enable or disable the blinking function (read/write).
-
The T bit is used to reset the blink timing (this data is not stored - transient bit).
-
The R bit is used to globally clear the P0 and P1 registers corresponding to all display bits (this data is not stored - transient bit).
-
The I bit is used to select whether the brightness of each bit is controlled globally or individually (read/write).
-
The P bit is used to return the current blink timing phase (read only - writing a value to this bit will be ignored).
Table 3. Configuration register format
CONFIGURATION
REGISTER DATA BIT |
DATA
BIT LABEL |
STATE | FUNCTION |
D7 | P | 0 | P1 Blink Phase |
1 | P0 Blink Phase | ||
D6 | I | 0 |
Intensity for all digits is controlled by one setting in the Global
Intensity Register |
1 |
Intensity for digits is controlled by the individual settings in the
Intensity10 through Intensity76 registers. |
||
D5 | R | 0 | Digit data for both planes P0 and P1 are unaffected |
1 | Digit data for both planes P0 and P1 are cleared on the rising edge of active-low CS | ||
D4 | T | 0 | Blink timing counters are unaffected. |
1 | Blink timing counters are reset on the rising edge of active-low CS. | ||
D3 | AND | 0 | Blink function disabled |
1 | Blink function enabled | ||
D2 | B | 0 | Slow Blinking. Segments blink on for 1s, off for 1s with fOSC = 4MHz. |
1 | Fast Blinking. Segments blink on for 0.5s, off for 0.5s with fOSC = 4MHz. | ||
D1 | X | X | Don't care |
D0 | S | 0 | Shutdown |
1 | Normal Operation |
The display driver is started by writing 0x01 to register 0x04, and the mode of operation is set to global brightness control with flicker disabled. The internal oscillator starts when the MAX6954 exits shutdown mode, and the oscillator output pin is OSC_OUT. Note that the 16-segment display remains blanked when the power-up state of data control registers 0x60 to 0x67 is 0x20 or no segments are illuminated (see Table 2 and Figure 3).
The MAX6954 has an internal ASCII font map for 104 characters for 16-segment displays. The characters are standard ASCII fonts plus
the common symbols, , and . These 104 characters are represented by 7 bits, and the 8th bit is used to select whether the decimal point (DP) is illuminated (see Table 4). The data register has two levels, P0 and P1. Each display bit is represented by 2 bytes in memory, one byte is located at P0 and the other is located at P1 (see Table 7). The data register is a mapped address mode, so each bit of data can be updated in P0 (registers 0x20 to 0x27), in P1 (registers 0x40 to 0x47), or in both levels at the same time (registers 0x60 to 0x67). The data in the data register does not directly control the display of each segment in the 16-segment display. Instead, it is used to address a character generator that stores 16-segment font data (see Figure 3). The lower 7 bits of the register data (D6 to D0) are used to select characters from the font. The highest bit (D7) controls the display of the decimal point (DP); setting it to 1 displays DP, and setting it to 0 does not display DP.
Table 4. Digital type data register format
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