Cadence Releases Complete Digital and Signoff Reference Flow-EEWORLD

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On February 1, 2016, Cadence Design Systems (NASDAQ: CDNS) announced the official delivery of a complete digital and signoff reference flow for Imagination Technologies (IMG.L) PowerVR Series7 graphics processing unit (GPU). Using this highly integrated Cadence® reference flow, the complete synthesis and design implementation of 5.5 million instances can be completed in 2.5 days. Compared with the previous generation of Cadence design flow, the product development design time is shortened by more than 1 times. At the same time, after adopting the new reference flow, the chip area is reduced by an average of 3%, and the area of Imagination's most complex blocks can be reduced by up to 7%.

The reference flow is simple to use and requires only a single execution; it also provides designers with guidance to optimize PowerVR GPU cores using easy-to-deploy and support files and scripts. The flow includes the following Cadence digital and signoff tools:

Innovus™ Implementation System: A next-generation physical implementation tool that leverages a massively parallel processing architecture to help SoC developers design high-quality products with strong PPA performance (power, performance, and area).

Genus™ Synthesis Solution: Register transfer level (RTL) synthesis and physical synthesis engines help RTL designers improve design efficiency and meet development challenges. With this solution, synthesis time is further reduced by up to 5 times, data path area can be reduced by up to 20%, and linear scalability of over 10 million instances is achieved.

Tempus™ Timing Signoff Solution: A complete set of timing analysis tools that leverages massive parallel processing and physically-aware timing optimization to avoid signoff timing closure.

Conformal® Equivalence Checker: The industry’s most widely supported independent formal verification solution that enables verification and debugging of multi-million gate designs without the need for test vectors.

Quantus™ Quasi-Resonant Transformation Extraction Solution: A next-generation parasitic extraction tool that has been proven in actual development and design, running faster than single-corner or multi-corner extraction solutions; and the industry's best accuracy compared to Foundry Golden

“PowerVR GPUs are the industry’s leading graphics technology, used in the development and design of some of the world’s most renowned products,” said Tony King-Smith, executive vice president of marketing at Imagination. “Our customers value the speed and size reduction that highly scalable GPUs can bring to chip production and design. Working with Cadence, we have created a reference flow based on their digital and signoff tools, enabling licensees to produce smaller, faster chips, faster.”

“We can expect our mutual customers to design products with even better PPA performance when adopting the new Cadence Digital and Signoff reference flow for Imagination PowerVR GPUs,” said Dr. Anirudh Devgan, senior vice president and general manager of the Digital and Signoff Division at Cadence. “By focusing on the complex needs of designers in their current environment, we have created an optimized flow for PowerVR that delivers even better performance and will help customers using PowerVR GPUs design more reliable, innovative products in less time and further reduce time to market.”

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