Design of software phase-locked loop based on DSP technology

Commonly used phase locks include hardware phase lock and software phase lock. Traditional hardware phase lock is to detect the zero crossing of voltage signal through logic devices. The circuit is simple and the design is ingenious, but it has some shortcomings. When the grid voltage has a sudden change in frequency or phase or the three-phase voltage is unbalanced, it is difficult to achieve phase lock, and the dynamic performance is poor. Software phase lock has good anti-interference ability and can achieve phase lock with higher accuracy and faster speed.

Therefore, based on the analysis of the basic principles of the phase-locked loop, this paper builds a grid-connected test platform and adopts software phase-locked technology with free design and strong adaptability. The experiment shows that this soft phase-locked technology can achieve phase locking well.

1 Basic Principles of Phase-Locked Loop

The phase-locked loop is a phase error feedback system, which consists of a phase detector (PD), a low-pass filter (LPF) and a voltage-controlled oscillator (VCO). Its working principle is to convert the phase difference between the input voltage signal and the internal signal of the SPLL into a DC quantity, and then pass it through the voltage-controlled oscillator after the filter to adjust the frequency and phase of the signal, so that it has the same frequency and phase as the grid voltage. Its control structure diagram is shown in Figure 1.

Among them, the phase detector adopts a multiplier to form a closed-loop phase-locked loop based on the multiplication phase detector, and compares the phase of the output signal v0 of the voltage-controlled oscillator with the input signal vg, thereby generating a phase difference error voltage vd.

Phase detector output formula (1):

It can be found in the above formula that there are high-frequency components in the phase difference output by the phase detector, so a low-pass filter is needed to filter out the high-frequency components. The low-pass filter is actually a proportional integral controller PI, which filters out the second harmonic components and noise in the error voltage vd to ensure the stability of the system. The error transfer function output of the PI controller is formula (2).

The voltage-controlled oscillator plays an integrating role in the phase-locked loop, that is, the voltage-controlled oscillator is actually an inherent integrating link in the phase-locked loop, completing the voltage/frequency conversion.

2 Hardware Circuit Design

2.1 Brief Introduction of DSP28335

The DSP chip used in this paper is TMS320F28335, which has a 12-bit pipelined analog/digital converter and 6 independent ePWM modules. The ADC has 16 channels and 1 conversion core, which can realize sequential sampling and simultaneous sampling. A complete ePWM output channel includes two signals, EPWMxA and EPWMxB. The IPM module drive signal in the experimental system is generated by this module.

2.2 Signal Conditioning Circuit

This design uses the Hall voltage sensor VSM025 to sample the AC voltage and convert the collected grid voltage into -3~+3V; at the same time, the voltage signal output by the sensor is differentially amplified and raised through the signal conditioning circuit, and a 0~3V voltage signal is output, and the signal is collected and processed after AD sampling by DSP. The signal conditioning circuit is shown in Figure 2.

2.3 Signal output circuit

PWM signal is a series of pulse signals with variable pulse width. Its output can be used to represent analog signals. The desired analog signal can be obtained by integrating at the PWM output end. The PWM wave generated in this system drives the IPM module through the logic chip, and the waveform is output to the PWMDAC port through the RC low-pass filter circuit for observation. The circuit diagram is shown in Figure 3.

3 Software Algorithm Design

In the grid-connected power generation system, the grid voltage phase is locked through phase-locking technology, so that the inverter output current is in the same frequency and phase as the grid voltage. The control accuracy of phase-locking technology directly affects the performance of grid-connected operation. The flowchart of software phase-locking is shown in Figure 4.

4 Experimental Verification

4.1 Verification using PWMDAC

In order to verify the effect of software phase locking, an experimental platform was built. The platform includes six parts: simulated power grid, voltage sensor, signal conditioning circuit, DSP (TMS320F28335) core board, signal output circuit, and digital oscilloscope, as shown in Figure 5.

The voltage of one phase of the three-phase grid voltage is detected by the Hall voltage sensor, and the collected signal is processed by the signal conditioning circuit, then sampled by the AD port of the DSP, phase-locked inside the DSP, and output through the RC filter circuit of the PWM port. The output waveform of the PWMDAC port and the grid voltage waveform are observed by a digital oscilloscope to judge the effect of the phase lock.

The waveform observed by the oscilloscope is shown in Figure 6. The voltage of the simulated power grid in the system is 18V, as shown by the blue line (upper), and the green line (lower) is the output voltage of the PWMDAC port. It can be found through observation that the waveform of the PWMDAC is consistent with the phase of the power grid voltage, which well achieves the locking of the power grid voltage phase.

4.2 Grid connection verification

The grid-connected experimental platform is built on the basis of software phase locking, which includes eight parts: three-phase simulated power grid, voltage sensor, signal conditioning circuit, DSP (TMS320F28335) core board, IPM module, three-phase inductor, current sensor, and digital oscilloscope, as shown in Figure 7. The IPM module uses the model PS21765 of Mitsubishi Corporation, and the logic, control, detection and protection circuits are integrated inside the IPM. The inductance value of the three-phase inductor is 7mH. The current sensor detects the output current signal, and its signal conditioning circuit is the same as the voltage.

The PWM signal generated by DSP drives Mitsubishi's IPM through the logic circuit. When connected to the grid, the phase-locked waveform and output voltage are observed first, and the grid connection is achieved under the premise of meeting the conditions. The grid connection result waveform is shown in Figure 8. The red line is the output current waveform, and the blue line is the grid voltage waveform after passing through the sensor.

It was observed that the output current of the grid-connected inverter was consistent with the grid voltage phase, thus achieving phase locking and inverter grid connection.

5 Conclusion Starting from the theory of software phase-locked loop, this paper designs and implements a phase-locked loop based on DSP technology, which solves the problem of low precision and poor accuracy of traditional hardware phase-locked loop. It is verified through PWMDAC and actual grid connection. The experimental results show that this method is simple and feasible and has good practical value.