Full-chip mixed-signal design solution

In the early days of digital IC design (early 1960s), circuits were hand-made and schematics (diagrams) were hand-drawn using paper, pen and mimeograph. These schematics illustrated the logic gates and their associated operational functions to build the design and the connections between them.

At least one member of each design team specializes in implementation logic, minimization, and optimization, which ultimately results in replacing an entire group of communication gates to perform the same work faster or occupy less silicon chip area.

Functional verification – checking that the design works as planned – is usually performed by a group of engineers sitting around a table looking at a schematic and saying, “Eh, that looks good to me!” Similarly, timing verification – checking that the design meets the required input/output and internal path delays and does not violate any internal registers (such as setup and hold parameters) is performed with pencil and paper.

Finally, the entire set of diagrams that lay out the structure of the logic gates and the interconnections between them are all hand-drawn. These simple shapes, such as squares and rectangles, are used to make photo-masks, which are then used to make the actual silicon chip.

The earliest digital ICs were classified as "fully custom" in today's terms, because the size and shape of each geometric element that made up the individual components were hand-drawn. To address the time-consuming and error-prone shortcomings, schematic capture software packages emerged. Building digital designs at the abstract communication gate level is like creating a software program using assembly language.

The assembly process is a good implementation in terms of performance and memory capacity, but it is very time-consuming to capture and verify, and is not easily transferred to other computers for continued development. Similarly, the communication gate layer description is also time-consuming to capture and verify, and is not easily transferred to new fabs or processes.

Once the solution must be transferred to a programming language such as C for higher-level development, the high-level description will be translated into the machine language instructions required by the computer. The advantage is that it allows software developers to quickly grasp the program intent and then verify the function. In addition, programs written in C language can also be easily moved to other computer platforms.

Once digital logic designers began to move to a higher level of abstraction called RTL (Register Transfer Level), they could use logic synthesis technology, which became available in the late 1980s and early 1990s, to translate the RTL description into a corresponding netlist. This "front-end" synthesis technology was complemented by a "back-end" automated place-and-route engine that could take a netlist and perform physical construction of the design.

In small designs, the results of synthesis engines at the communication layer of abstraction may not be comparable to hand-drawn design. However, in addition to quickly and concisely grasping the design intent and greatly improving the productivity of designers, the ability of synthesis engines to automatically perform speed and area trade-offs shows that the overall performance of synthesis engines is still better than hand-drawn.

The evolution of simulation tools

Computer-aided design and verification tools for analog circuits were developed much earlier than digital circuits. The design of individual components such as transistors, resistors, capacitors, and inductors usually involves first creating a physical prototype of the design, then testing it, measuring the actual value, determining its performance, adjusting the component value, and adding/removing components as necessary to achieve the desired effect.

In the late 1960s and early 1970s, many universities and commercial companies began developing analog simulators. These programs allowed students and engineers to simulate the operation of analog circuits without actually building the circuits. The most famous early simulator was the Simulation Program with Integrated Circuit Emphasis (SPICE) developed by the University of California, Berkeley, which became very popular in the early 1970s.

Over the past few years, analog simulators have made great progress in the evolution of basic models and algorithms, as well as in the performance of simulation engines. Today's analog design and verification tools are basically limited to drawing and simulating transistor-level circuit diagrams.

• Describe analog functions at a high level of abstraction and then use these descriptions to generate transistor-level equivalent circuits.

• Automatically optimize analog circuits.

• Automatically place and route analog circuits.

The result is that most analog integrated circuits are still custom-made and hand-drawn. In addition to being expensive, time-consuming, and error-prone, this transistor-level design approach does not allow existing designs to be easily transferred to new foundries or process/technology nodes. Instead, the design migration must start from the construction of the circuit. This shows that the most advanced digital design has entered 45nm technology, but the most advanced analog design is still at 90nm, and even many analog designs are still stuck in the quagmire of 130nm and 250nm, which are technologies from 5 to 10 years ago.

Mixed Signal Tools Evolution

So far, progress in tools for true mixed-signal solutions has been slow. As mentioned earlier, to meet cost, size, weight and power requirements, analog and digital functions will be combined in a single "mixed-signal" device, and some EDA companies are trying to "bolt together" existing analog and digital simulation engines.

Traditionally, companies that specialize in digital design have tried to solve their problems by purchasing existing, proven analog solutions. The motivation was to expand market share by acquiring the customer base of analog companies, but the result was an inability to integrate a large number of scattered fragmented tools. Even in today's "latest" mixed-signal and fully customized design environments, digital and analog design teams still work in their own way, and they are completely unaware of what each other is doing. It is not uncommon for people in the two disciplines to see each other for the first time when the chip is completed, at which time the analog and digital blocks have already been placed and routed. However, chip completion is usually a manual process, including many tasks that occur before the chip goes into production (tapeout). Due to the lack of automation, the work and disposal of the chip completion usually cannot be fed back into the main design flow, resulting in major problems of reuse in future designs. (This article is provided by MAGMA Product Manager)

Caption: In a traditional design environment, the cycle between custom layout and standard cell placement and routing can add weeks to chip development time.

Caption: The Titan Chip Finishing system includes circuit layout editing software and provides a complete Quartz LVS verification solution.

Caption: Titan automatic routing can further improve productivity.