More features for next-generation power packs for implantable medical devices

When it comes to implantable medical devices, saving space is one of the most critical design issues. This article reviews packaging concepts that can reduce the space required for electronic power components so that the overall implant can shrink— adding more functionality without expanding the space available.

Figure 1 : Metallized TSV

The market for implantable medical devices remains large. Both demographic drivers and the number of uses are clearly expanding. Much of the market growth comes from efforts to expand the surgical treatments that electronics can be involved in. Improved pacemaker-like products can be used to stop chronic back and leg pain and migraines. In addition, there are other medical electronics that can be used to regulate symptoms related to depression, anxiety, obsessive-compulsive disorder, and bulimia. This is a slow-changing industry, and the increasing pressure on cost, performance, and quality for medical device suppliers has driven innovation in products and services. But miniaturization remains a key growth driver for implantable medical devices. For patients, a smaller device can make the surgical incision smaller, making the wound less scary, the procedure less urgent, the body heal faster, and the implant less obvious.

High power components such as IGBTs , SCRs , MOSFETs and rectifiers used in implantable medical devices present unique circuit layout challenges to circuit designers. First, larger die sizes are required to handle the energy issues. For example, in an implantable cardiac defibrillator, voltages can be as high as 700 volts and surge currents can be as high as 60 amps. Second, electrical contacts are required on both the top and bottom of the implanted device. Power devices are manufactured in a "vertical" structure, allowing higher blocking voltages and higher currents. Third, high voltage arcs must be controlled. Chips and wires are still commonly used in implantable medical devices. In addition to a protective coating, careful spacing of the die and wires is critical to prevent arcing. Designers are looking for a packaging solution that eliminates arcing, coatings, and wire bonding, while maximizing board space savings. A chip-level flip-chip power package that can connect the back side to the front side of the same board is needed.

Ceramic carrier

One way to create a planar flip-chip power package is to attach the die to a ceramic carrier. In this case, the ceramic carrier is shaped like an inverted " L ". The die is soldered or epoxied to the ceramic. Metal traces are embedded into the ceramic to route the backside connections to the front side, creating a planar device. Both the die and the ceramic carrier are filled with solder balls to allow for planar flip-chip attachment, which saves space compared to chip and wires. In addition, ceramic is a good insulator that withstands high voltage arcs. Problems to overcome in manufacturing include X, Y and Z planarity, as the die can move or tilt when attached to the ceramic carrier.

TSV Technology

Another solution is to use metal-filled through silicon vias ( TSVs ). With this approach, the chip size is expanded to include inactive silicon areas adjacent to active silicon. A circuit channel is created by drilling a via in the inactive silicon and then filling it with metal (Figure 1 ). The current flows from the active silicon area through the metal on the back to the TSV . This allows the contacts on the back to be transferred to the front. The chip size increases, but not as much as the first chip with a ceramic carrier solution. Figure 1 is just a diagram of the structure when TSVs are used . Many variations can be derived from this basic structure. For example, back connections are created to allow interposer connections or die stacking.

TSV is an emerging manufacturing process that seems to be a promising solution for handling high currents in power devices. However, according to VLSI Research at the recent International Interconnect Technology Conference, "mass production of TSV is still several years away." Before mass production, the processing cost per wafer will still be too high. The lower-cost TSV solution is still being tested in power device production.

Figure 2 Power chip on insulator