Implementation of Industrial Gateway Based on AVR ATmega128

Nowadays, electronic technology is developing rapidly, especially single-chip microcomputers have been widely used in communication, transportation, household appliances, portable intelligent instruments, robot manufacturing and other fields. The product functions, precision and quality have been greatly improved, and the circuits are simple, the failure rate is low, the reliability is high and the cost is low. In some applications of single-chip microcomputers, the demand for network flexibility and diversity is increasing, and the interconnection between networks is becoming more and more important. Industrial gateways provide a solution for bridging different fieldbus networks.

2 Network topology

The topological structure of the network connection is shown in Figure 1.

(Figure 1)

RS-232C is a widely used serial communication standard, but due to its early introduction, it has exposed obvious shortcomings in modern network communications, such as slow data transmission speed, short transmission distance, and easy interference between signals at the interface. RS-485 is a multi-transmitter circuit standard that expands the performance of RS-422A, allowing a transmitter on a twisted pair to drive 32 load devices. The load device can be a passive transmitter, receiver or transceiver. The maximum transmission distance of RS-485 is 1200m, and the maximum transmission rate can reach 10Mb/s. Therefore, RS-485 is very attractive in remote communications and multi-machine bus systems.

As shown in Figure 1, the standard universal asynchronous receive/transmit communication interface 0 (UART0) of AVR ATmega128 is converted into a half-duplex 485 serial port. Similarly, the RS-232C serial port of the PC is also converted into a 485 serial port. They communicate with each other using the Modbus/RTU protocol, with AVR ATmega128 as a slave device. AVR ATmega128 and its downstream AVR sub-control devices are connected together through the 485 serial bus. They communicate with each other using the multi-machine communication method unique to the AVR microcontroller. Among them, AVR ATmega128 is the master control device, and other AVR sub-control devices are slave control devices.

3 AVR ATmega128 microcontroller

The ATmega128 microcontroller is an 8-bit low-power CMOS microprocessor based on the AVR RISC structure. Due to its advanced instruction set and single-cycle instruction execution time, the data throughput of the ATmega128 microcontroller is as high as 1MIPS/MHz, so it can alleviate the contradiction between the system's power consumption and processing speed. The AVR microcontroller core has a rich instruction set and 32 general working registers. All registers are directly connected to the arithmetic logic unit (ALU), so that one instruction can access two independent registers simultaneously in one clock cycle. This structure greatly improves code efficiency and has a data throughput 10 times higher than that of ordinary complex instruction set microprocessors. The ATmega128 microcontroller has 128KB of in-system programmable Flash program memory, which has the ability to read while writing, that is, read-while-write (RWW); 4KB of EEPROM; 4KB of SRAM; 53 general-purpose I/O port lines; 32 general-purpose working registers; real-time clock (RTC); 4 flexible timers/counters (T/C) with compare mode and PWM function; 2 USARTs; byte-oriented two-wire interface (TWI); 8-channel 10-bit ADC; optional programmable gain; programmable watchdog timer for the on-chip oscillator; serial peripheral interface (SPI); JTAG test interface compatible with IEEE 1149.1 specification, which can also be used for on-chip debugging; 6 power saving modes that can be selected by software.

4 Modbus Communication Protocol

The Modbus protocol is a universal language used in electronic controllers. Through this protocol, controllers can communicate with each other, controllers via networks (such as Ethernet) and other devices. It has become a universal industrial standard. With it, control devices produced by different manufacturers can be connected to an industrial network for centralized monitoring. This protocol defines a message structure that a controller can recognize and use, regardless of the network they communicate through. It describes the process of a controller requesting access to other devices, how to respond to requests from other devices, and how to detect errors and record them. It establishes a common format for the message field structure and content. When communicating on a Modbus network, this protocol determines that each controller needs to know their device address, identify the message sent by the address, and decide what action to take. If a response is required, the controller will generate feedback information and send it using the Modbus protocol. On other networks, messages containing the Modbus protocol are converted to the frame or packet structure used on this network. This conversion also expands the method of resolving node addresses, routing paths and error detection according to specific networks.

Modbus network can be set to communicate in either of two transmission modes (ASCII or RTU). The user selects the desired mode, including serial communication parameters (baud rate, checksum, etc.). When configuring each controller, all devices on a Modbus network must select the same transmission mode and serial port parameters.

When the controller is set to communicate in RTU (Remote Terminal Unit) mode on the Modbus network, each 8-bit byte in the message contains two 4-bit hexadecimal characters. The main advantage of this method is that more data can be transmitted than ASCII at the same baud rate.

Code system:

ü 8-bit binary, hexadecimal 0...9, A...F

ü Each 8-bit field in the message consists of two hexadecimal characters.

Bits per byte:

ü 1 start position

ü 8 data bits, the least significant bit is sent first

ü 1 parity bit, no parity bit

ü 1 stop bit (with parity), 2 bits (without parity)

Error detection domain

ü CRC (Cyclic Redundancy Check)

Using RTU mode, message transmission must start with a pause interval of at least 3.5 character times. This is easiest to achieve in networks with varying character times (as shown in Figure 2 below). The first field transmitted is the device address. The transmission characters that can be used are hexadecimal 0...9, A...F. Network devices continuously detect the network bus, including during the pause interval. When the first field (address field) is received, each device decodes it to determine whether it is sent to itself. After the last transmitted character, a pause of at least 3.5 character times marks the end of the message. A new message can start after the pause.

The entire message frame must be transmitted as a continuous stream. If there is a pause of more than 3.5 character times before the frame is completed, the receiving device will refresh the incomplete message and assume that the next byte is the address field of a new message. Similarly, if a new message starts within less than 3.5 character times after the previous message, the receiving device will think it is a continuation of the previous message. This will cause an error because the value of the CRC field at the end cannot be correct. A typical RTU message frame is shown below:

When messages are transmitted over a standard Modbus serial network, each character or byte is sent in the following order (from left to right): Least Significant Bit... Most Significant Bit.

When using RTU character frames, the bit sequence is:

With parity check

No parity

5 CRC16 detection

Cyclic redundancy code (CRC) verification technology is widely used in the field of measurement, control and communication. CRC calculation can be realized by dedicated hardware, but for low-cost microcontroller systems, the key issue is how to complete the CRC calculation through software, that is, the problem of CRC algorithm, without hardware support. There are three algorithms for calculating CRC16: bit-by-bit CRC, byte-by-byte CRC, and half-byte CRC. These three algorithms are slightly different. The bit-by-bit method is slower, but occupies the smallest memory space; the method of looking up CRC by byte is faster, but occupies a larger memory; the method of looking up CRC by half-byte is a balance between the first two, that is, it will not occupy too much memory, and the speed is not too slow, which is more suitable for the application of 8-bit microcontrollers with small memory.

6 AVR MCU Multi-Processor Communication Mode

Setting the multiprocessor communication mode bit (MPCM) of UCSRA can filter the data frames received by the USART receiver. Frames without address information will be ignored and not stored in the receive buffer. In a multiprocessor system, the processors communicate over the same serial bus, and this filtering effectively reduces the number of data frames that need to be processed by the CPU. The setting of the MPCM bit does not affect the operation of the transmitter, but it is used differently in systems using multiprocessor communication mode. If the data frame received by the receiver is 5 to 8 bits long, the first stop bit indicates whether the frame contains data or address information. If the data frame received by the receiver is 9 bits long, the 9th bit (RXB8) determines whether it is data or address information. If the bit that determines the frame type (the first stop bit or the 9th data bit) is 1, then this is an address frame, otherwise it is a data frame. In multiprocessor communication mode, multiple slave processors can receive data from a master processor. First, the address frame must be decoded to determine which processor is addressed. If a processor is addressed, it will receive the subsequent data normally, while the other slave processors will ignore these frames until another address frame is received.

For a processor acting as a master, it can use the 9-bit data frame format (UCSZ = 7). If the transmission is an address frame (TXB8 = 1), the 9th bit (TXB8) is set to 1, and if it is a data frame (TXB = 0), it is cleared to 0. In this frame format, the slave processor must work in the 9-bit data frame format.

The following are the steps for data exchange in multi-processor communication mode:

5.1 All slave processors are operating in multi-processor communication mode (MPCM bit in the UCSRA register is set).

5.2 After the master processor sends the address frame, all slave processors will receive and read this frame. The RXC bit of the slave processor UCSRA register is set normally.

5.3 Each slave processor will read the contents of the UDR register to determine whether it is selected. If selected, it will clear the MPCM bit of UCSRA, otherwise it will wait for the next address byte to arrive and keep MPCM as 1.

5.4 The addressed slave processors will receive all data frames until a new address frame is received, while those slave processors that keep the MPCM bit as 1 will ignore these data frames.

5.5 After the addressed processor receives the last data frame, it will set MPCM and wait for the master processor to send the next address frame. Then the steps after step 2 are repeated.

Using 5 to 8 bit frame format is possible but not practical because the receiver must switch between using n and n+1 frame format. This setup makes full duplex operation difficult because the receiver and transmitter use the same character length setting. If using 5 to 8 bit frame format, the transmitter should set two stop bits (USBS = 1), where the first stop bit is used to determine the frame type. Do not use read-modify-write instructions (SBI and CBI) to manipulate the MPCM bit. The MPCM and TXC flags use the same I/O unit and may be accidentally cleared using SBI or CBI instructions. In this design, the AVR ATmega128 is used as the master processor in multiprocessor communication mode, and the other AVR sub-control devices are used as slave processors.

7 Conclusion

The network topology introduced in this scheme is adopted. Since the communication between AVR ATmega128 and the host computer is based on the Modbus standard protocol, and the multi-processor communication unique to the AVR microcontroller is adopted with other AVR sub-control devices, the data processing efficiency can be improved while ensuring the openness of the system. This design scheme has a certain reference value in terms of traffic control, intelligent parking lot management system, etc.