Design and implementation of CAN module based on LPC2131 embedded system

Abstract: For processors without an integrated CAN controller, CAN communication can be achieved through an external CAN interface. Taking Philips' ARM7 processor LPC2131 as an example, a relatively general hardware design and key software code for implementing CAN communication based on the embedded real-time operating system μCOS-II are given.
Keywords: LPC2131; CAN bus; ARM; μCOS-II; embedded system

With the rapid development of information technology, ARM technology solution architecture, as a 32-bit embedded microprocessor with low power consumption, high performance, and small size, has been licensed by many intellectual property users, including the world's top semiconductor and system companies. It has been widely used in various electronic products, automobiles, consumer entertainment, imaging, industrial control, mass storage, network, security and wireless fields. Industry insiders believe that the ARM-based technology solution is the solution with the most market prospects and market advantages.

Fieldbus CAN is a serial communication protocol developed to solve the data exchange between many electronic control modules in modern cars. Because it has multiple master stations to access the bus based on priority, uses non-destructive bus arbitration, can complete the error detection and priority judgment of communication data, the data length is up to 8 bytes, the transmission time is short, the probability of interference is low, the anti-interference ability is strong, and the communication rate can reach up to 1Mbit/s. It is widely used in automobiles, industry, consumer electronics and other fields, and is recognized as one of the most promising field buses.

Based on ARM's advantages in embedded systems and the wide application of CAN bus, more and more ARM processors are equipped with CAN controllers, which greatly facilitates the development of CAN bus by developers. However, there are still some products with ARM processors that do not have built-in CAN controllers. In order to meet the real-time and reliability requirements of data transmission between nodes without changing the original hardware structure, it is a more appropriate choice to realize CAN communication through an external CAN interface module.

Based on the ARM7TDMI-S processor LPC2131, this paper designs a more general CAN interface module hardware circuit for processors without an integrated CAN controller, and designs the reliability of the CAN bus. In addition, it designs embedded software for realizing CAN communication based on the embedded real-time operating system μCOS-II, and finally verifies the reliability and feasibility of CAN bus communication in practice.

LPC2131

Philips LPC2131 is a high-performance 32-bit RISC microcontroller based on ARM7TDMI-S. It has all the advantages of ARM processors: low power consumption and high performance; at the same time, it has relatively rich on-chip resources, which is very suitable for the development of embedded products. Its features are as follows:

·Integrated Thumb extended instruction set.
·32KB on-chip Flash that can be programmed in the system (ISP) and 8KB RAM that can be programmed in the application (IAP), with vector interrupt controller.
·2 UARTs, 2 I2C serial interfaces, 2 SPI serial interfaces, 2 timers (7 capture/compare channels), PWM unit can provide up to 6 PWM outputs, 8-channel 10-bit ADC, real-time clock RTC, watchdog timer WDT, 48 general-purpose I/O pins.
·CPU clock is up to 60MHz, with on-chip crystal oscillator and on-chip PLL.

LPC2131 does not have an integrated CAN controller, and cannot use the CAN bus for communication. In order to enable LPC2131 to use the CAN bus for communication, its functions can be expanded through external expansion.

Hardware circuit design

Since LPC2131 is an ARM7TDMI-S microprocessor powered by 3.3V, its various IO pins are 3.3V TTL level and can withstand 5V voltage. The independent CAN controller SJA1000 is powered by 5V, and the level of each IO port is 5V TTL level, so the two are compatible and their IO can be directly connected.

LPC2131 and CAN controller interface

LPC2131 and CAN controller interface are shown in Figure 1. P0.8~P0.15 of LPC2131 is directly connected to AD0~AD7 of SJA1000 to realize data interaction, P0.22, P0.25, P0.31, P0.23 are respectively connected to ALE/AS, RD/E, WR, CS of SJA1000 to realize reading, writing and chip selection, P0.30, P0.27 are respectively connected to INT and RST of SJA1000 to realize interrupt and reset. When LPC2131 accesses SJA1000, it can simulate the read and write timing specified in SJA1000 through software. The mode pin MODE of SJA1000 is set to a high level through VCC, so that SJA1000 works in Intel mode.

Figure 1 LPC2131 and CAN controller interface circuit

CAN transceiver and CAN bus

interface The interface of CAN transceiver and CAN bus is shown in Figure 2, where TX0 and RX0 of SJA1000 are connected to TXD and RXD of CAN transceiver respectively. In order to improve the anti-interference ability of the interface part between CAN transceiver 82C250 and CAN bus, a common mode choke is connected in series with CANH and CANL pins of 82C250 to eliminate certain common mode interference, so that the bus differential signal can pass smoothly. And CANH and CANL are connected to the bus through a magnetic bead respectively to eliminate certain high-frequency interference. At the same time, two 30pf small capacitors are connected in parallel between CANH and CANL and ground, which can filter out high-frequency interference on the bus and have certain anti-electromagnetic radiation ability. In addition, a TVS is connected between the two CAN bus access ends and the ground. When the CAN bus has a higher voltage, it is grounded through the breakdown of the TVS, which can play a certain overvoltage protection role. A slope resistor is connected to the RS pin of 82C250 to reduce the outward radiation of the CAN bus.

Figure 2 CAN transceiver and bus interface circuit

For other processors that can withstand 5V TTL level without built-in CAN controller, the hardware design of the external CAN interface can be completed by simply changing the pins connected to the SJA1000 data port ALE/AS, RD/E, WR, CS, INT, RST. Otherwise, a logic level conversion device can be added between the two.

Software Design

Read and write access to SJA1000

Since all 48 pins of LPC2131 are IO, it is necessary to first simulate the timing of reading and writing SJA1000 through software to operate SJA1000 and then complete the CAN communication function.

According to the read and write timing of SJA1000 in Intel mode [4], the write function void WriteCan (uint8 Addr, uint8 Data) for LPC2131 to send data through the CAN controller SJA1000 and the read function uint8 ReadCan (uint8 Addr) for receiving data received by the CAN controller can be written, where Addr is the address of the corresponding register of SJA1000, Data is the data sent by LPC2131, and the read function ReadCan can return the received data.

Implementation of CAN communication

To implement a CAN communication, three functional modules need to be implemented: the initialization module for SJA1000; the data sending module; and the data receiving module.

· Initialization module for SJA1000
Before starting communication, you must first set up the various function registers of SJA1000, including mode register, baud rate, clock divider, interrupt enable register, filter register, and output control register.

uint8 IniSJA1000(uint8 BTR0,uint8 BTR1)
{
IO0CLR=CS; //Chip select SJA1000
WriteCan(0,0x09); //Enter reset mode
WriteCan(31,0xe8); //Set clock divider
WriteCan(4,0xfd); //Set interrupt enable register
WriteCan(16,AcceptCode1); //Set acceptance code 1
WriteCan(17,AcceptCode2); //Set acceptance code 2
WriteCan(18,AcceptCode3); //Set acceptance code 3
WriteCan(19,AcceptCode4); //Set acceptance code 4
WriteCan(20,MaskCode1); //Set acceptance mask 1
WriteCan(21,MaskCode2); //Set acceptance mask 2
WriteCan(22,MaskCode3); //Set acceptance mask 3
WriteCan(23,MaskCode4); //Set acceptance mask 4
WriteCan(6,BTR0); //Set bus timing register 1
WriteCan(7,BTR1); //Set bus timing register 2
WriteCan(8,0xfa); //Set output control register
WriteCan(0,0x08); //Enter operation mode
OSCANMbox=OSMboxCreate(0);/Establish CAN communication
mailbox
if (OSCANMbox==NULL)
{
return FALSE;
}
return TRUE;
}

·Data sending module
Assume that the ID of the data to be sent is stored in the array ID[4], and the data is stored in the array SendData[8]. The sending module program is as follows, where the parameter DLC is the number of bytes to be sent, and FF is the frame type, that is, 0 is a data frame and 1 is a remote frame.
void Tx(uint8 DLC,uint8 FF)
{
uint8 i;
OS_ENTER_CRITICAL();
If (FF==0x01)
{
WriteCan(16,DLC+0x80); //Data frame
}
else
{
WriteCan(16,DLC+0xd0); //Remote frame
}
WriteCan(17,ID[0]);
WriteCan(18,ID[1]);
WriteCan(19,ID[2]);
WriteCan(20,ID[3]); //TX identification code
for (i=0;i WriteCan(21+i,sentdata[i]); //TX data
WriteCan(1,0x01);//Set the send register to send
OS_EXIT_CRITICAL();
}

·Data receiving module

According to the circuit diagram 1, the interrupt receiving method is used to receive data. The P0.30 of LPC2131 is set to external interrupt 3. The entire data receiving module is composed of the data receiving function void ReceiveData(uint8 *Rt), interrupt processing function Can_Exception(void). When SJA1000 receives CAN bus data, it causes LPC2131 to generate external interrupt 3 through receiving interrupt, so that it enters the interrupt processing function and then processes the received data. The data receiving function and interrupt processing function are as follows:

void ReceiveData (void)
{
uint8 i, err, *Rt;
OS_ENTER_CRITICAL();
Rt=(uint8 *)OSMboxPend(OSCANMbox,0,&err);
//Receive data through the mailbox
for (i=0;i<13;i++)
ReceiveData[i]=*Rt++; //Store the received data
in the global variable for subsequent processing
OS_EXIT_CRITICAL();
}
void Can_Exception(void)
{
uint8 temp[13],i;
OS_ENTER_CRITICAL();
for (i=0;i<13;i++)
temp[i]=ReadCan(16+i); //Read CAN data
OSMboxPost(OSCANMbox,(void *)temp); //Send
CAN data to the receiving function via mailbox
EXTINT=0x08; //Clear ENT3
VICVectAddr=0; //Return from interrupt
OS_EXIT_CRITICAL();
}

Conclusion

Embedded systems that use ARM chips as the main controller and CAN bus as a data transmission method for communication have been increasingly widely used. At the same time, the reliability of CAN communication has also become one of the key parts affecting system performance. Taking LPC2131 as an example, this paper gives a relatively common hardware connection method between a type of microprocessor and the CAN controller SJA1000, designs the reliability of the CAN bus, and develops CAN communication software based on the embedded real-time operating system μCOS-II. This design has now been applied in the distributed monitoring system in the factory workshop, and it runs reliably and stably.

References:

1. Jean J.Labrosse, MicroC/OS-II The Teal-Time Kernel (Second Edition) Translated by Shao Beibei et al. "Embedded Real-Time Operating System uC/OS-II (Second Edition)", Beijing University of Aeronautics and Astronautics Press, May 2003
2. Du Chunlei, "ARM Architecture and Programming", Tsinghua University Press, 2003
3. LPC2131/LPC2132/2138 Product data, Philips Semiconductors. 2004
4. SJA1000 Datasheet, Philips Semiconducto-rs. 1999