Pulse capture application of STC15F2K60S2

Pulse capture application of STC15F2K60S2

1. PCA working mode register CMOD

The format of the PCA operating mode register is as follows:

CMOD: PCA operating mode register

CIDL: Control bit for whether to stop PCA counting in idle mode.

When CIDL=0, the PCA counter continues to work in idle mode;

When CIDL=1, the PCA counter stops working in idle mode.

CPS2, CPS1, CPS0: PCA count pulse source selection control bits. PCA count pulse selection is shown in the following table.

For example, when CPS2/CPS1/CPS0=1/0/0, the clock source of PCA/PWM is SYSclk, timer 0 is not used, and the frequency of PWM is SYSclk/256

If you want to use the system clock/3 as the clock source of PCA, you should let T0 work in 1T mode, and count 3 pulses to generate overflow. Output 14K~19K frequency PWM. The overflow of T0 can be used to divide the system clock by 1~256 levels.

ECF: PCA count overflow interrupt enable bit.

When ECF = 0, the interrupt of the CF bit in register CCON is disabled.

When ECF = 1, the interrupt of the CF bit in register CCON is enabled.

2. PCA control register CCON

The format of the PCA control register is as follows:

CCON: PCA control register

CF: PCA counter array overflow flag. CF is set by hardware when the PCA counter overflows. The CF flag can be used to generate an interrupt if the ECF bit in the CMOD register is set. The CF bit can be set by hardware or software, but can only be cleared by software.

CR: PCA counter array operation control bit. This bit is set by software to start the PCA counter array counting. This bit is cleared by software to shut down the PCA counter.

CCF1: PCA module 1 interrupt flag. This bit is set by hardware when a match or capture occurs. This bit must be cleared by software.

CCF0: PCA module 0 interrupt flag. Set by hardware when a match or capture occurs. This bit must be cleared by software.

3. PCA compare/capture registers CCAPM0 and CCAPM1

The format of the compare/capture register for PCA module 0 is as follows:

CCAPM0: Compare and capture register of PCA module 0

B7 : Reserved for future use.

ECOM0: Enable comparator function control bit.

When ECOM0 = 1, the comparator function is enabled.

CAPP0: Positive capture control bit.

When CAPP0 = 1, rising edge capture is enabled.

CAPN0: Negative capture control bit.

When CAPN0 = 1, falling edge capture is enabled.

MAT0: Match control bit.

When MAT0 = 1, a match between the PCA count value and the module's compare/capture register value will set the interrupt segment flag bit CCF0 in the CCON register.

TOG0: Toggle control bit.

When TOG0 = 1, it works in PCA high-speed output mode, and the value of the PCA counter matches the value of the module's compare/capture register, which will cause the CEX0 pin to flip.

(CEX0/PCA0/PWM0/P1.3 or CEX0/PCA0/PWM0/P4.2)

PWM0: pulse width modulation mode.

When PWM0 = 1, the CEX0 pin is allowed to be used as a pulse width modulation output.

（CEX0 / PCA0 /PWM0 / P1.3或CEX0/PCA0/PWM0 / P4.2）

ECCF0: Enable CCF0 interrupt. Enable the compare/capture flag CCF0 in register CCON to generate an interrupt.

The format of the compare/capture register of PCA module 1 is as follows:

CCAPM1: Compare/Capture Register for PCA Module 1

B7: Reserved for future use.

ECOM1: Enable comparator function control bit.

When ECOM1=1, the comparator function is enabled.

CAPP1: Positive capture control bit.

When CAPP1 = 1, rising edge capture is enabled.

CAPN1: Negative capture control bit.

When CAPN1 = 1, falling edge capture is enabled.

MAT1: Match control bit.

When MAT1=1, the PCA count value matches the module's compare/capture register value, which sets the interrupt flag bit CCF1 in the CCON register.

TOG1 toggle control bit.

When TOG1 = 1, it works in PCA high-speed output mode, and the match between the PCA counter value and the module's compare/capture register value will cause CEX1 to flip.

(CEX1/ PCA1/ PWM1 P1.4 or EX1 /CA1/WM 1/ P4.3

PWM1 pulse width modulation mode.

When PWM1=1, the CEX1 pin is allowed to output pulse width modulation.

(CEX1/ PCA1/ PWM1/ P1.4 or EX1/ CA1/ WM1/ P4.3

ECCF1: Enable CCF0 interrupt. Enable the compare/capture flag CCF1 in register CCON to generate an interrupt.

The working mode setting table of the PCA module is listed in the following table:

PCA module working mode setting (CCAPMn register, n=0,1)

PCA 16-bit counter - lower 8 bits CL and 8 bits CH

The addresses of CL and CH are E9H and F9H respectively, and the reset values ​​are both 00H, which are used to save the load value of PCA.

PCA Capture/Compare Registers – CCAPnL (low byte) and CCAPnH (high byte)

When the PCA module is used for capture or comparison, they are used to save the 16-bit capture count value of each module; when the PCA module is used in PWM mode, they are used to control the output duty cycle. Among them, n = 0, 1, corresponding to module 0 and module 1 respectively. The reset value is 00H. Their corresponding addresses are:

CCAP0L-EAH, CCAP0H-FAH: capture/compare registers for module 0.

CCAP1L-EBH, CCAP1H-FBH: capture/compare registers for module 1.

PCA module PWM registers PCA_PWM0 and PCA_PWM1

The format of the PWM register of PCA module 0 is as follows:

PCA_PWM0: PWM register for PCA module 0

EPC0H: In PWM mode, it forms a 9-bit number with CCAP0H.

EPC0L: In PWM mode, it forms a 9-bit number with CCAP0L.

The format of the PWM register of PCA module 1 is as follows:

PCA_PWM1: PWM register for PCA module 1

EPC1H: In PWM mode, it forms a 9-bit number with CCAP1H.

EPC1L: In PWM mode, it forms a 9-bit number with CCAP1L.

Working mode of PCA module

Capture Mode:

To make a PCA module work in capture mode, two bits (CAPNn and CAPPn) of register CCAPMn or any one of them must be set to 1. When the PCA module works in capture mode, the transition of the module's external CCPn input (CCP0/P1.3, CCP1/P1.4) is sampled. When a valid transition is sampled, the PCA hardware loads the value of the PCA counter array register (CH and CL) into the module's capture register (CCAPnL and CCAPnH).

If the CCFn bit in the CCON special function register and the ECCFn bit in the CCAPMn special function register are set, an interrupt will be generated. In the interrupt service routine, you can determine which module has generated the interrupt and pay attention to the software clearing of the interrupt flag bit.

1-bit software timer mode

The PCA module can be used as a software timer by setting the ECOM and MAT bits in the CCAPMn register (above). The value of the PCA timer is compared with the value of the module capture register, and when the two are equal, an interrupt will be generated if both the CCFn bit (in the CCON special function register) and the ECCFn bit (in the CCAPMn special function register) are set.

[CH,CL] automatically increases by 1 at regular intervals, and the time interval depends on the selected clock source. For example, when the selected clock source is SYSclk/12, [CH,CL] increases by 1 every 12 clock cycles. When [CH,CL] increases to equal [CCAPnH,CCAPnL], CCFn=1, and an interrupt request is generated. If the same value is added to [CCAPnH,CCAPnL] in the interrupt service program interrupt after each PCA module interrupt, the interval time T of the next interrupt is also the same, thus realizing the timing function. The length of the timing time depends on the selection of the clock source and the setting of the PCA counter value. The following example illustrates the calculation method of the PCA counter count value.

Assume that the system clock frequency SYSclk = 18.432MHz, the selected clock source is SYSclk/12, and the timing time T is 5ms, then the PCA counter count value is:

The count value of the PCA counter = T/((1/SYSclk) * 12) = 0.005/(1/18432000) * 12) = 7680 (decimal number) = 1E00H (hexadecimal number)

That is to say, the PCA timer counts 1E00H times, and the timing time is 5ms, which is also the value (step size) added to [CCAPnH, CCAPnL] each time.

Pulse Width Modulation (PWM)

Pulse Width Modulation (PWM) is a technology that uses a program to control the waveform duty cycle, cycle, and phase waveform. It is widely used in three-phase motor drive, D/A conversion, etc. The PCA module of the STC12C5A60S2 series microcontroller can be set by program to work in 8-bit PWM mode. The structure of the PWM mode is shown in the figure below.

All PCA modules can be used as PWM outputs. The output frequency depends on the clock source of the PCA timer.

Since all modules share the only PCA timer, all of their output frequencies are the same. The output duty cycle of each module varies independently, depending on the capture register [EPCnL, CCAPn] used. When the value of register CL is less than {EPCNL, CCAPNL}, the output is low; when the value of register CL is equal to or greater than {EPCnL, CCAPnL}, the output is high. When the value of CL overflows from FF to 00, the content of [EPCnH, CCQAPnH] is loaded into {EPCnL, CCAPnL}. This allows PWM to be updated without interference. To enable PWM mode, the PWMn and ECOMn bits of the module CCAPMn register must be set.

Since PWM is 8 bits, PWM frequency = PCA clock input source frequency / 256

The PCA clock input source can be selected from one of the following eight sources: SYScLK, SYSclk/2, SYSclk/4, SYSclk/6, SYSclk/8, SYSclk/12, Timer 0 overflow, and ECI/P3.4 input/output.

Example: Require the PWM output frequency to be 38KHZ, select SYSclk as the PCA/PWM clock input source, and find the value of SYSclk

By the calculation formula 38000=SYSclk/256, we get the external clock frequency SYSclk = 38000 x256 x 1=9728000

If you want to achieve adjustable frequency PWM output, you can select the overflow rate of timer 0 or the input of the ECI pin as the clock input source of PCA/PWM

When EPCnL = 0 and ECCAPnL = 00H, PWM output is fixed high

When EPCnL = 1 and ECCAPnL = 0FFH, PWM output is fixed low

When an I/O port is used as PWM, the status of the port is:

4. Procedure:

#include

sfr CCON = 0xd8;    

sfr CMOD = 0xd9; //PCA working mode register

sfr CCAPMO = 0xda;

sfr CCAPM1 = 0xdb;

sfr CCAPM2 = 0xdc;

sfr CL = 0xe9;

sfr CH = 0xF9;

sfr CCAP0L = 0xea;