Research on Fast Algorithm for Audio Frequency Spectrum Display Using Single Chip Microcomputer

1 Introduction

In home theater, karaoke and other audio systems, real-time display of the spectrum of music signals will add a lot of color to the audio system. At present, most of the actual audio system products use the following two methods to realize audio spectrum display: one is to use hardware filters and A/D converters; the other is to use DSP to process spectrum display. The former is simple to implement, but the hardware cost is high, and the latter is more complicated in both software and hardware implementation. Here, a practical fast Fourier transform algorithm is proposed to realize spectrum display in view of the characteristics of small RAM resources and slow computing speed of single-chip microcomputers.

2 System overall design and principle

The system design consists of a single-chip microcomputer SST89V58RD2, an audio data sampling circuit, an A/D conversion circuit, a spectrum display circuit, etc. Figure 1 is a block diagram of the overall system design principle.

The system can be divided into three parts from the functional point of view: (1) The audio data acquisition circuit realizes the sampling and holding and quantization processing of the analog audio signal, including the audio sampling circuit and the adding conversion circuit; (2) The spectrum display circuit realizes the segmented display of the analog audio signal spectrum. It divides the audio signal spectrum into 14 segments, each segment is quantized according to 14 levels, and is displayed by the VFD display device; (3) The main controller uses the SST89V58RD2 microcontroller. On the premise of completing other control tasks of the system, the remaining computing resources of the microcontroller are fully utilized, and the optimized FFT algorithm is used to calculate the audio signal spectrum, and the calculation results are output to the spectrum display circuit.

3 Audio signal acquisition and preprocessing

3.1 Sampling frequency

According to Shannon's sampling theorem, the sampling frequency should generally be at least twice the highest frequency of the sampled audio signal. Since the human ear can perceive frequencies between 20 Hz and 20 kHz, the theoretical maximum sampling frequency is 40 kHz. There are three types of sampling frequencies widely used in industry: 44 kHz, 16 bit sound is called CD quality; 22 kHz, 16 bit sound is similar to stereo broadcast (FMStereo), called broadcast quality; 11 kHz, 8 bit sound is called telephone quality. In order to improve the accuracy of spectrum calculation, this paper intends to use a sampling frequency of 40 kHz and a data bit length of 8 bits.

3.2 Sample size

After the sampling frequency is determined, the sample value, that is, the number of sampling points required to complete an FFT operation, must also be determined. According to the basic principles of digital signal processing, assuming that the sampling frequency is Fs and the number of sampling points is N, then after the FFT operation, the frequency represented by the nth point is: Fn=[(n-1)×Fs]／N(1≤n≤N). If Fn is to be accurate to Hz, a signal with a sampling length of (1/f)s must be sampled. To improve the frequency resolution, the number of sampling points needs to be increased, but this is not realistic in some practical applications. In this case, the frequency subdivision method is used, that is, sampling a relatively short signal, and then adding a certain number of 0s at the end to make its length reach the required number of points, and then performing FFT, which can improve the frequency resolution to a certain extent. Since the system divides the audio signal spectrum into 14 segments for display, a 16-point FFT operation is used, and the results of the 1st and 16th points are removed.

3.3 Audio Data Acquisition Circuit

The A/D converter uses TLC549, which has 8-bit conversion results, differential reference voltage input, 3-wire data serial output interface, maximum conversion time of 17μs, access and conversion times of 40,000 times per second, all non-calibrated errors of ±0.5LSB, low power consumption, maximum 15 mW. Therefore, this device fully meets the system's 40kHz sampling frequency requirements.

Figure 2 is the system audio data acquisition circuit. The audio signal comes from the music signal output by the CD or DVD player, so it is basically noise-free. Considering that the audio signal is an AC signal with a voltage range of ±0.1 V, and the input of TLC549 must be DC with a voltage range of 0 to 5 V, it also requires a pre-processing process of rectification and amplification. After A/D conversion, an 8-bit digital value of the audio amplitude is obtained.

4 Audio spectrum algorithm

The audio spectrum value is calculated using the Fast Fourier Transform (FFT) algorithm. In order to increase the refresh rate of the display, the system reads the A/D conversion value 16 times every 10 ms to obtain a 16-point real number sequence, and then completes the 16-point FFT operation to obtain a 16-point complex number sequence.

4.1 Reversal and its optimization algorithm

The radix 2-FTT algorithm stores the original data in reverse order, but the result after operation is output in normal order. The original sampled data is placed in the array float datalm[16], datalm[0] stores the A/D conversion value read for the first time, datalm[1] stores the A/D conversion value read for the second time, and so on. It can be seen that the A/D conversion value read for the nth time (n=(b3b2b1b0)b) is stored in dataIm[n]. After the reverse operation, the sampled data is stored in float dataRe[16], and the original A/D conversion value read for the nth time is stored in datalm[n](n=(b0b1b2b3)b). According to the sample size, a reverse table array is established in the system code segment, and a fast reverse operation is implemented by table lookup. Compared with the shift operation and other methods, the operation speed can be significantly improved.

4.2 Butterfly Operation and Its Optimization Algorithm

According to the radix-2-FFT algorithm, the N-point FFT operation can be divided into log2N stages, each stage has N/2 butterfly operations, as shown in Figure 3.

The derivation process of the butterfly operation formula is as follows:

Simplifying formula (1) into the form of real part and imaginary part, we get:

It can be seen that the output of each butterfly operation is obtained by the product and accumulation of its input value and a certain sine function and cosine function. The sine and cosine table is compiled by equation (3) to equation (6), and the table can be looked up each time a butterfly operation is performed to speed up the operation.

The basic idea of ​​the radix-2-FFT algorithm is to use three layers of loops to complete all N-point FFT operations: (1) the innermost loop processes a single butterfly operation and uses a table lookup method to implement multiplication operations; (2) the middle layer loop completes N/2 butterfly operations at each level; (3) the outermost loop completes log2N levels of butterfly operations.

From this we can see that: in each level, the innermost loop completes N/2L butterfly operations; the middle loop controls the innermost loop to perform 2L-1 operations. Therefore, when the middle loop is completed, a total of 2L-1xN/2L=N/2 butterfly operations are performed. In fact, the innermost and middle loops complete the L-th level of calculations, and the outermost loop finally completes log2N levels of butterfly operations.

The data that need to be explained are: (1) in the Lth level, the two input ends of each butterfly are one point apart, b=2L-1; (2) the same multiplier corresponds to N/2L butterflies with adjacent intervals of 2L points; (3) P in the 2L-1 butterfly factors WPN of the Lth level can be expressed as P=jx25-L, where j=0, 1, 2, ...(2L-1-1).

The RAM required to complete a 16-point FFT operation is 128 bytes, while the RAM of the microcontroller SST89V58RD2 is 1 K bytes: the display is refreshed every 10 ms, and the clock frequency of the microcontroller SST89V58RD2 is 40 MHz. The actual time required to complete a 16-point FFT operation is less than 6 ms. Therefore, the system fully meets the time complexity and space complexity requirements of the FFT operation.

5 Display of spectrum values ​​on VFD

The system requires that the audio signal spectrum be divided into 14 segments, each segment is quantized at 14 levels, and then displayed using a VFD display. Therefore, the FFT operation result must be converted before it can be output to the display. The FFT operation result of the nth point is a complex number, the real part is dataRe[n], and the imaginary part is datalm[i]. The modulus value of this point divided by 2/N is the amplitude of the signal at the corresponding frequency (for the first point, it is divided by N); the phase of this point is the phase of the signal at the corresponding frequency. The final result is saved in dataRe[i]. Because the audio signal spectrum is divided into 14 segments, the values ​​of dataRe[0] and dataRe[15] should be discarded. At the same time, dataRe[i] may not be an integer, and the VFD display requires that each frequency band be quantized at 14 levels. Therefore, the value of dataRe[i] needs to be quantized into an integer from 0 to 14, and finally output to the VFD circuit for display.

6 Conclusion

The fast Fourier transform algorithm for realizing spectrum display of sound system by single chip microcomputer is discussed, the algorithm is optimized for SST89V58RD2 single chip microcomputer, and the realization method of the system is discussed in detail. The results show that the method is feasible.